Patents by Inventor Hiroshi Hayama

Hiroshi Hayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030122771
    Abstract: A Liquid Crystal Display (LCD), a backlight used for the LCD and a method for producing the LCD and the backlight are provided which are capable of inhibiting an increase in component counts and in assembling processes and of reducing them, thereby achieving low costs. A display image is obtained by arranging a backlight section being able to perform scanning as a single unit in a manner that it positionally matches a liquid crystal displaying section. The backlight section is provided with a plurality of scanning electrodes and light emitting layers each providing a different luminescent color, and being spatially separated from each other on a principal face of the backlight and scanning is performed on a plurality of light emitting layers providing a different luminescent color.
    Type: Application
    Filed: October 23, 2002
    Publication date: July 3, 2003
    Applicant: NEC Corporation
    Inventors: Ken Sumiyoshi, Toshihiro Yoshioka, Hiroshi Hayama, Jin Matsushima
  • Patent number: 6407791
    Abstract: A multi-domain liquid crystal display device having sharp contrast and excellent viewing angle characteristics is provided without increased complicated processes such as microfabrication for a common electrode or without the necessity for highly sophisticated laminating technology. The multi-domain liquid crystal display device is composed of a control electrode connected to a source terminal being one of terminals of a TFT (Thin Film Transistor) serving as a switching device, a picture electrode having an aperture section provided with one coupling capacitor connected between the pixel electrode and the control electrode, wherein a partial voltage of a signal voltage is applied to the pixel electrode through the other coupling capacitor.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventors: Teruaki Suzuki, Masayoshi Suzuki, Toshiya Ishii, Hiroshi Hayama, Hiroshi Kanoh, Naoyasu Ikeda, Ken-Ichi Takatori, Takashi Nose, Takahiko Watanabe
  • Patent number: 6362493
    Abstract: An amorphous silicon thin film transistor for active matrix liquid crystal displays according to the present invention comprises a transparent conductive film, which is formed together with a picture element electrode, a metal film, which is formed together with a signal wiring, a multi-layer film, and an insulation substrate. The multi-layer film, which consists of a semi-conductor film, a gate insulation film and a gate metal film, is placed on the transparent conductive film and metal film overlapping respectively at both edges of the multi-layer film.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: March 26, 2002
    Assignee: NEC Corporation
    Inventors: Hiroshi Hayama, Shinichi Nishida
  • Patent number: 6278506
    Abstract: A liquid crystal display has a holographic polymer dispersed liquid crystal between transparent substrates, and a plurality of phase gratings are formed in the holographic polymer dispersed liquid crystal so as to selectively reflect light components for the three primary colors.
    Type: Grant
    Filed: December 17, 1996
    Date of Patent: August 21, 2001
    Assignee: NEC Corporation
    Inventors: Ken Sumiyoshi, Hiroshi Hayama
  • Patent number: 6248634
    Abstract: An amorphous silicon thin film transistor for active matrix liquid crystal displays according to the present invention comprises a transparent conductive film, which is formed together with a picture element electrode, a metal film, which is formed together with a signal wiring, a multi-layer film, and an insulation substrate. The multi-layer film, which consists of a semi-conductor film, a gate insulation film and a gate metal film, is placed on the transparent conductive film and metal film overlapping respectively at both edges of the multi-layer film.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: June 19, 2001
    Assignee: NEC Corporation
    Inventors: Hiroshi Hayama, Shinichi Nishida
  • Publication number: 20010003448
    Abstract: The provision of a liquid crystal display driving process which prevents the appearance of motion blur without any increase in circuit size or any reduction in panel numerical aperture. A driving process for a liquid crystal display in which a plurality of scanning lines 2 and a plurality of signal lines 3 are disposed in a grid like arrangement, and display of an image corresponding with image data is performed by selecting any one of the scanning lines 2 at one time, and altering the state of a liquid crystal via the signal line 3, wherein an image data selection period t1 and a black display selection period t2 are set within a time frame shorter than the time necessary for scanning any one of the aforementioned scanning lines 2, and an image corresponding with the aforementioned image data is displayed via the aforementioned signal line 3 during the image data selection period t1, and a monochromatic image is displayed via the aforementioned signal line 3 during the black display selection period t2.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 14, 2001
    Inventors: Takashi Nose, Hiroshi Hayama
  • Patent number: 6069370
    Abstract: An amorphous silicon thin film transistor for active matrix liquid crystal displays according to the present invention comprises a transparent conductive film, which is formed together with a picture element electrode, a metal film, which is formed together with a signal wiring, a multi-layer film, and an insulation substrate. The multi-layer film, which consists of a semi-conductor film, a gate insulation film and a gate metal film, is placed on the transparent conductive film and metal film overlapping respectively at both edges of the multi-layer film.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: May 30, 2000
    Assignee: NEC Corporation
    Inventors: Hiroshi Hayama, Shinichi Nishida
  • Patent number: 5936598
    Abstract: A drive circuit is provided which enables low-power-consumption drive of even a low-voltage capacitive load. The drive circuit used has a capacitance, one end of which is grounded and other end of which is connected in series via an analog switching circuit to one end of an inductive element, thereby forming a series LC resonant circuit, the other end of the inductive element being connected to one end of a capacitive load, the other end of which is grounded, a PMOS switching element being connected between the ungrounded end of the above-noted load capacitance and a positive drive voltage supply and an NMOS switching element being connected between the ungrounded end of the load capacitance and a ground terminal.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: August 10, 1999
    Assignee: NEC Corporation
    Inventors: Hiroshi Hayama, Takashi Nose
  • Patent number: 5818406
    Abstract: A driver circuit for a liquid crystal display device has an output terminal, an N-MOS transistor, a P-MOS transistor, a first semiconductor switch connected between the output terminal and the N-MOS transistor and, a second semiconductor switch connected between the output terminal and the P-MOS transistor. Each of the N-MOS transistor and the P-MOS transistor have source, drain, gate and substrate, and form a power source portion taking the source as an output side. The first and second semiconductor switches have control inputting means for inputting a switching control signal for alternately outputting the output voltages of the N-MOS transistor and the P-MOS transistor through the output terminal. The drain, gate and substrate voltages are set so that the output voltage output from the N-MOS transistor is greater than the output voltage output from said P-MOS transistor.
    Type: Grant
    Filed: November 28, 1995
    Date of Patent: October 6, 1998
    Assignee: NEC Corporation
    Inventors: Hiroshi Tsuchi, Hiroshi Hayama
  • Patent number: 5814981
    Abstract: In a multi-valued voltage generating circuit including a voltage divider connected between first and second nodes and formed by a series of resistors, and an output circuit, connected to the first and second nodes and nodes of the resistors, for selecting one of voltages at the first and second nodes and the nodes of said resistors and generating the one of voltages at an output terminal, first and second control voltage circuits are connected to the first and second nodes to control an output voltage at the output terminal to compensate for fluctuations of the threshold voltages of MOS transistors of the output circuit. Also, first and second current control circuits are connected to the first and second nodes, to control currents flowing through the series of resistors to control a difference in potential between the first and second nodes at a certain value and to compensate for the fluctuation of the resistance.
    Type: Grant
    Filed: February 18, 1997
    Date of Patent: September 29, 1998
    Assignee: NEC Corporation
    Inventors: Hiroshi Tsuchi, Hiroshi Hayama
  • Patent number: 5739593
    Abstract: n (an integer of two or more) resistors are serially connected between a first terminal to which a first voltage is applied and a second terminal to which a second voltage is applied. Gates of the (n+1) MOS transistors are connected to the corresponding one among the first terminal, the second terminal, and nodes between n resistors. The sources of the (n+1) MOS transistors provide (n+1) different output voltages.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: April 14, 1998
    Assignee: NEC Corporation
    Inventor: Hiroshi Hayama
  • Patent number: 5648293
    Abstract: The invention provides a novel method of depositing an amorphous silicon film wherein a high frequency discontinuous discharge is carried out to decompose a silane system gas for a chemical vapor deposition for depositing an amorphous silicon film under conditions of a cyclic frequency of 500 Hz or more and a duty ratio of 30% or less.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: July 15, 1997
    Assignee: NEC Corporation
    Inventors: Hiroshi Hayama, Hiroyuki Uchida, Kazushige Takechi
  • Patent number: 5416341
    Abstract: A silicon-on-insulator (SOI) substrate has an insulating substrate having a glass substrate and an insulating layer formed on the substrate, an array of isolated silicon film pieces formed on a pixel area of the insulating substrate, a meshed silicon film formed on a drive circuit area of the insulating substrate, both the meshed and isolated silicon films being composed of hydrogenated amorphous silicon or polycrystalline silicon. In manufacturing a semiconductor device from the SOI substrate, the meshed silicon film is annealed for recrystallizing selectively from the isolated silicon film pieces by induction heating. A reliable and reproducible semiconductor device for use in LCD is fabricated at a low cost.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: May 16, 1995
    Assignee: NEC Corporation
    Inventor: Hiroshi Hayama
  • Patent number: 4612083
    Abstract: A process of fabricating a three-dimensional semiconductor device, comprising the steps of preparing at least two multilayer structures each including at least one semiconductor element and a conductor connected at one end to the semiconductor element and having at the other end an exposed surface, at least one of the multilayer structures further including a thermally fusible insulating adhesive layer having a surface coplanar with the exposed surface of the conductor, positioning the multilayer structures so that the exposed surfaces of the respective conductors of the multilayer structures are spaced apart from and aligned with each other, moving at least one of the multilayer structures with respect to the other until the exposed surfaces of the conductors of the multilayer structures contact each other, and heating the multilayer structures for causing the insulating adhesive layer of at least one of the multilayer structures to thermally fuse to the other multilayer structure with the semiconductor elem
    Type: Grant
    Filed: July 17, 1985
    Date of Patent: September 16, 1986
    Assignee: NEC Corporation
    Inventors: Masaaki Yasumoto, Hiroshi Hayama, Tadayoshi Enomoto