Abstract: A substrate transport method is employed in a substrate processing system including a plurality of processing chambers, a load lock chamber, a vacuum transport device provided in a vacuum transport chamber connecting the load lock chamber and the plurality of processing chambers and configured to simultaneously transport a plurality of substrates, and an atmospheric transport device provided in an atmospheric transport chamber and configured to transport a substrate from a carrier to the load lock chamber. The substrate transport method includes acquiring in advance a relative positional error for a case where the plurality of substrates are transported from the load lock chamber to the plurality of processing chambers and placed on a stage in the plurality of processing chambers, and placing the plurality of substrates on a stage in the load lock chamber, based on a transport path of the plurality of substrates and the relative positional error.

Abstract: A substrate processing method includes: a step of preparing a substrate in a chamber of a substrate processing apparatus; a step of correcting a set power value based on a correction value Y from Equation (1), coefficients A, B, C, and D, and a variable X indicating a processed amount of the substrates having been subjected to continuous film formation processes, referring to a storage in which the coefficients A, B, C, and D of the Equation (1) used to calculate the correction value Y for the set power value are stored; and a step of processing the prepared substrate by applying power with the corrected power value into the chamber, the Equation (1) is expressed as Y=Aexp(BX)+CX+D, where at least one of the coefficients A, C, and D is not zero, and when the coefficient A is not zero, the coefficient B is also not zero.

Abstract: A processing apparatus for processing a substrate includes: a plurality of end devices; a low-level controller configured to control specific end devices among the plurality of end devices; and a module controller configured to execute a recipe for processing the substrate, to specify control steps satisfying a specific condition among a plurality of control steps of the recipe, and to transmit the specified control steps to the low-level controller, wherein the low-level controller controls the specific end devices based on the control steps received from the module controller.

Abstract: A processing apparatus for processing a substrate includes: a plurality of end devices; a low-level controller configured to control specific end devices among the plurality of end devices; and a module controller configured to execute a recipe for processing the substrate, to specify control steps satisfying a specific condition among a plurality of control steps of the recipe, and to transmit the specified control steps to the low-level controller, wherein the low-level controller controls the specific end devices based on the control steps received from the module controller.

Abstract: There are provided an epoxy resin composition exhibiting less warpage after molding and during a solder treatment process as well as during a low temperature process of, for example, a temperature cycle test, and excellent in flame retardancy, solder crack resistance, and flowability; and a semiconductor device using the same. The epoxy resin composition used in the semiconductor device contains at least one type of epoxy resin (A) selected from a trifunctional epoxy resin and a tetrafunctional epoxy resin, a curing agent (B) having at least two hydroxyl groups per molecule, a compound (C) having at least two cyanate groups per molecule, and an inorganic filler (D), as essential components.

Abstract: A multilayered circuit board of the present invention has a single-side laminated structure and does not include a core substrate having via-holes formed therethrough and vias for providing electrical connection through the via-holes. The multilayered circuit board includes a plurality of pairs of layers, each pair including a conductor circuit layer and an insulator layer, wherein a glass transition temperature of each insulator layer is 170° C. or higher, a coefficient of thermal expansion at the glass transition temperature or lower of each insulator layer is 35 ppm or less, and a modulus of elasticity of each insulator layer is 5 GPa or more.

Abstract: The invention offers technology for suppressing damage to semiconductor devices due to temperature changes. When flip-chip mounting a silicon chip on a buildup type multilayer substrate having a structure with a thinned core, a core having a small coefficient of thermal expansion is used in the multilayer substrate, and the coefficient of thermal expansion and glass transition point of the underfill are appropriately designed in accordance with the thickness and coefficient of thermal expansion of the core. By doing so, it is possible to relieve stresses inside the semiconductor package caused by deformation of the multilayer substrate due to temperature changes, and thereby to suppress damage to the semiconductor package due to temperature changes.

Abstract: The present invention provides a solder resist material, which can suppress the warpage of a semiconductor package upon exposure to heat or impact even when used in a thin wiring board and meets a demand for size reduction in electronic devices and a higher level of integration, and a wiring board comprising the solder resist material and a semiconductor package. The solder resist material of the present invention can effectively suppress the warpage of a semiconductor package through a fiber base material-containing layer interposed between resin layers. The fiber base material-containing layer is preferably unevenly distributed in the thickness direction of the solder resist material.

Abstract: A multilayered circuit board of the present invention has a single-side laminated structure and does not include a core substrate having via-holes formed therethrough and vias for providing electrical connection through the via-holes. The multilayered circuit board includes a plurality of pairs of layers, each pair including a conductor circuit layer and an insulator layer, wherein a glass transition temperature of each insulator layer is 170° C. or higher, a coefficient of thermal expansion at the glass transition temperature or lower of each insulator layer is 35 ppm or less, and a modulus of elasticity of each insulator layer is 5 GPa or more.

Abstract: The invention offers technology for suppressing damage to semiconductor devices due to temperature changes. When flip-chip mounting a silicon chip on a buildup type multilayer substrate having a structure with a thinned core, a core having a small coefficient of thermal expansion is used in the multilayer substrate, and the coefficient of thermal expansion and glass transition point of the underfill are appropriately designed in accordance with the thickness and coefficient of thermal expansion of the core. By doing so, it is possible to relieve stresses inside the semiconductor package caused by deformation of the multilayer substrate due to temperature changes, and thereby to suppress damage to the semiconductor package due to temperature changes.

Abstract: The present invention provides a solder resist material, which can suppress the warpage of a semiconductor package upon exposure to heat or impact even when used in a thin wiring board and meets a demand for size reduction in electronic devices and a higher level of integration, and a wiring board comprising the solder resist material and a semiconductor package. The solder resist material of the present invention can effectively suppress the warpage of a semiconductor package through a fiber base material-containing layer interposed between resin layers. The fiber base material-containing layer is preferably unevenly distributed in the thickness direction of the solder resist material.

Abstract: There are provided an epoxy resin composition exhibiting less warpage after molding and during a solder treatment process as well as during a low temperature process of, for example, a temperature cycle test, and excellent in flame retardancy, solder crack resistance, and flowability; and a semiconductor device using the same. The epoxy resin composition used in the semiconductor device contains at least one type of epoxy resin (A) selected from a trifunctional epoxy resin and a tetrafunctional epoxy resin, a curing agent (B) having at least two hydroxyl groups per molecule, a compound (C) having at least two cyanate groups per molecule, and an inorganic filler (D), as essential components.

Abstract: A curing accelerator which is suitable for various curable resin compositions, an epoxy resin composition having excellent curability, storage stability and fluidity, and a semiconductor device having excellent solder cracking resistance and moisture resistance reliability are provided. The epoxy resin composition includes a compound (A) having two or more epoxy groups in one molecule, a compound (B) having two or more phenolic hydroxyl groups in one molecule, trisubstituted phosphoniophenolate or a salt thereof as a curing accelerator (C), and an inorganic filler (D).

Abstract: This invention provides a method for diagnosing geriatric diseases associated with insulin resistance, such as type II diabetes, at an early stage and a method for monitoring the therapeutic effects of agents for type II diabetes by quantitatively assaying GBP28 with the use of a monoclonal antibody that can assay adiponectin (GBP28) in a sample.

Abstract: A flip-chip semiconductor package and method of manufacture thereof, the flip-chip semiconductor being highly reliable due to suppression of cracking. The flip-chip semiconductor package is formed by flip-chip bonding of a semiconductor chip-connecting electrode surface of a circuit board 1 and an electrode surface of a semiconductor chip 2, dispensing of an encapsulation resin 4 between the circuit board 1 and the semiconductor chip 2, and formation of fillet 4b by providing the encapsulation resin 4 on peripheral side portions of the semiconductor chip, the fillet 4b having inclined surfaces extending from upper edges 2a of the peripheral side portions of the semiconductor chip 2 outward toward the circuit board, wherein the angle of inclination formed between the inclined surfaces and the peripheral side portions of the semiconductor chip 2 is 50 degrees or less in the vicinity of the upper edges of the peripheral side portions 2a of the semiconductor chip.

Abstract: A curing accelerator which is suitable for various curable resin compositions, an epoxy resin composition having excellent curability, storage stability and fluidity, and a semiconductor device having excellent solder cracking resistance and moisture resistance reliability are provided. The epoxy resin composition includes a compound (A) having two or more epoxy groups in one molecule, a compound (B) having two or more phenolic hydroxyl groups in one molecule, trisubstituted phosphoniophenolate or a salt thereof as a curing accelerator (C), and an inorganic filler (D).

Abstract: A curing accelerator which is suitable for various curable resin compositions, an epoxy resin composition having excellent curability, storage stability and fluidity, and a semiconductor device having excellent solder cracking resistance and moisture resistance reliability are provided. The epoxy resin composition includes a compound (A) having two or more epoxy groups in one molecule, a compound (B) having two or more phenolic hydroxyl groups in one molecule, trisubstituted phosphoniophenolate or a salt thereof as a curing accelerator (C), and an inorganic filler (D).

Abstract: This invention provides a method for diagnosing geriatric diseases associated with insulin resistance, such as type II diabetes, at an early stage and a method for monitoring the therapeutic effects of agents for type II diabetes by quantitatively assaying GBP28 with the use of a monoclonal antibody that can assay adiponectin (GBP28) in a sample.

Abstract: This invention provides a method for diagnosing geriatric diseases associated with insulin resistance, such as type II diabetes, at an early stage and a method for monitoring the therapeutic effects of agents for type II diabetes by quantitatively assaying GBP28 with the use of a monoclonal antibody that can assay adiponectin (GBP28) in a sample.

Abstract: This invention provides a method for diagnosing geriatric diseases associated with insulin resistance, such as type II diabetes, at an early stage and a method for monitoring the therapeutic effects of agents for type II diabetes by quantitatively assaying GBP28 with the use of a monoclonal antibody that can assay adiponectin (GBP28) in a sample.