Patents by Inventor Hiroshi Homma

Hiroshi Homma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966456
    Abstract: A management system includes circuitry to receive an operation request for a specific device of one or more devices from a communication terminal used by a user for who user authentication has been successfully performed by a management system. The one or more devices and the communication terminal are communicating with each other to execute an event managed by the management system. The circuitry stores, in a memory, operation identification information and access information in association with each other. The operation identification information identifies a device operation associated with the operation request. The access information is associated with the user and used to access external storage. The circuitry uploads data acquired by the specific device according to the device operation corresponding to the operation identification information to the external storage using the access information associated with the operation identification information.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 23, 2024
    Assignee: Ricoh Company, Ltd.
    Inventors: Hiroshi Hinohara, Hidekuni Annaka, Takeshi Homma
  • Publication number: 20230400843
    Abstract: A line designing device including a calculation unit and a storage unit, in which the storage unit holds facility information indicating a specification of each module, process design information indicating a component for manufacturing a product, work on the component, and a module used for the work, standard module information indicating a type of each of the modules and another module attachable thereto, and inter-module connection information indicating a connection specification between the modules, the module includes at least one of a facility and a device used for the work, and the calculation unit generates line configuration information identifying the module constituting a manufacturing line for manufacturing the product and connection between the modules based on the facility information, the process design information, the standard module information, and the inter-module connection information, and outputs information indicating a module constituting the manufacturing line and connection between
    Type: Application
    Filed: October 14, 2021
    Publication date: December 14, 2023
    Inventors: Naohiro HAYASHI, Takahiro IWATA, Hiroshi HOMMA, Daiki KAJITA
  • Publication number: 20150359102
    Abstract: Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 10, 2015
    Inventors: Mitsuyuki KUBO, Junichi YAMADA, Hiroshi HOMMA
  • Patent number: 9129914
    Abstract: Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: September 8, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Mitsuyuki Kubo, Junichi Yamada, Hiroshi Homma
  • Publication number: 20150084051
    Abstract: Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.
    Type: Application
    Filed: September 23, 2014
    Publication date: March 26, 2015
    Inventors: Mitsuyuki Kubo, Junichi Yamada, Hiroshi Homma
  • Patent number: 8160152
    Abstract: A data storage unit (103) stores an image frame in which an image frame which consists of coded data having a data loss or error received by a receiving unit (100) and complementary coded data which is received by receiving unit at a later time are rearranged into normal sequence. A redecoding unit (105) decodes the image frame stored in the data storage unit (103) with reference to one or more already-decoded image frames required for the decoding, and stores the decoded image frame in a frame additionally-storage unit (104). A decoding unit (101) decodes an image frame with reference to an image frame stored in either a frame storage unit (102) or the frame additionally-storage unit 104 according to a command from a control unit (106).
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shu Murayama, Hiroshi Homma, Kunio Shibata
  • Publication number: 20070217519
    Abstract: A data storage unit (103) stores an image frame in which an image frame which consists of coded data having a data loss or error received by a receiving unit (100) and complementary coded data which is received by receiving unit at a later time are rearranged into normal sequence. A redecoding unit (105) decodes the image frame stored in the data storage unit (103) with reference to one or more already-decoded image frames required for the decoding, and stores the decoded image frame in a frame additionally-storage unit (104). A decoding unit (101) decodes an image frame with reference to an image frame stored in either a frame storage unit (102) or the frame additionally-storage unit 104 according to a command from a control unit (106).
    Type: Application
    Filed: July 10, 2006
    Publication date: September 20, 2007
    Inventors: Shu Murayama, Hiroshi Homma, Kunio Shibata
  • Patent number: 7190072
    Abstract: When an RFID-tag is formed by joining a semiconductor chip (RFID chip) to an antenna consisting of a rolled metal foil or the like using ultrasonic waves, the pressure impressed to the semiconductor chip is suppressed to avoid the damage of the semiconductor chip. For this purpose, the present invention provides an RFID-tag 1 wherein gold bumps are joined to the metal foil by pressing the gold bumps formed on the semiconductor chip against an antenna member, and impressing ultrasonic waves; and the RFID-tag wherein a matte surface having a low glossiness is formed on the metal foil, or a surface having shallow rolling streaks is formed on the metal foil, and gold bumps are joined to the surface.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: March 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Kanda, Madoka Minagawa, Kosuke Inoue, Hiroshi Homma
  • Publication number: 20070007344
    Abstract: In an RFID (radio frequency identification) tag comprising an antenna formed of a conductive paste containing conductive filler like silver flakes on a base member, and an RFID chip connected to the antenna, the present invention cures a pattern of the antenna formed of the conductive paste, and then connects the RFID chip to the antenna with thermoplastic resin contained in the conductive paste by heating bump electrodes of the RFID chip in contact with the antenna. According to the present invention, Since the bump electrodes of the RFID chip and the antenna are connected to each other and establish sufficient electrical conduction therebetween without providing an anisotropic conductive sheet or the like therebetween, a highly reliable RFID tag is supplied at a low cost.
    Type: Application
    Filed: July 3, 2006
    Publication date: January 11, 2007
    Inventors: Kosuke Inoue, Hiroshi Homma, Hitoshi Odashima, Naoya Kanda, Kie Ueda
  • Publication number: 20050230791
    Abstract: When an RFID-tag is formed by joining a semiconductor chip (RFID chip) to an antenna consisting of a rolled metal foil or the like using ultrasonic waves, the pressure impressed to the semiconductor chip is suppressed to avoid the damage of the semiconductor chip. For this purpose, the present invention provides an RFID-tag 1 wherein gold bumps are joined to the metal foil by pressing the gold bumps formed on the semiconductor chip against an antenna member, and impressing ultrasonic waves; and the RFID-tag wherein a matte surface having a low glossiness is formed on the metal foil, or a surface having shallow rolling streaks is formed on the metal foil, and gold bumps are joined to the surface.
    Type: Application
    Filed: March 10, 2005
    Publication date: October 20, 2005
    Inventors: Naoya Kanda, Madoka Minagawa, Kosuke Inoue, Hiroshi Homma
  • Patent number: 4203100
    Abstract: A smoke detector includes a light-emitting circuit, a light-receiving circuit, a smoke detecting space between the light-emitting and receiving circuits, and an amplifier circuit connected to the light-receiving circuit amplifying the output of the light-receiving circuit at an output terminal. An output comparison circuit is provided having an input terminal connected to the output terminal of the amplifier circuit and a voltage memory circuit is connected to another input terminal of the output comparison circuit. A detector circuit has one input terminal connected to the memory circuit and another input terminal connected to the output terminal of the comparison circuit, and a fire alarm circuit is connected to the detector circuit for operating an alarm when smoke from a fire fills such space between the light-emitting and receiving circuits, whereby contamination due to time and environmental factors has a minimal adverse effect on the detection of smoke in such space.
    Type: Grant
    Filed: May 19, 1978
    Date of Patent: May 13, 1980
    Assignee: Hochiki Corporation
    Inventors: Yukio Yamauchi, Hiroshi Homma