Patents by Inventor Hiroshi Inoguchi

Hiroshi Inoguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11519943
    Abstract: Implementations of a semiconductor package system may include a first bond wire bonded to a portion of a leadframe and to a pad of a semiconductor die, the first bond wire coupled to one of a power source or a ground; and a second bond wire bonded to the portion of the leadframe and to a control integrated circuit. The portion of the leadframe may form a current sense area and the control integrated circuit may be configured to use the second bond wire and the current sense area to measure a current flowing through the first bond wire during operation.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: December 6, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi Inoguchi, Takashi Nagashima, Masaru Maeda
  • Publication number: 20220137102
    Abstract: Implementations of a semiconductor package system may include a first bond wire bonded to a portion of a leadframe and to a pad of a semiconductor die, the first bond wire coupled to one of a power source or a ground; and a second bond wire bonded to the portion of the leadframe and to a control integrated circuit. The portion of the leadframe may form a current sense area and the control integrated circuit may be configured to use the second bond wire and the current sense area to measure a current flowing through the first bond wire during operation.
    Type: Application
    Filed: November 5, 2020
    Publication date: May 5, 2022
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi INOGUCHI, Takashi NAGASHIMA, Masaru MAEDA
  • Publication number: 20210320054
    Abstract: A semiconductor device package includes a leadframe, and a heatsink bonded to the leadframe. A semiconductor device may be mounted using the leadframe and positioned such that heat generated by the semiconductor device is conducted by the heatsink, with molding that encapsulates the leadframe, the heatsink, and the semiconductor device.
    Type: Application
    Filed: April 13, 2020
    Publication date: October 14, 2021
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi INOGUCHI, Takashi NAGASHIMA, Roger Paul STOUT, Namrata KANTH
  • Patent number: 11101197
    Abstract: Leadframe systems and related methods. Specific implementations of leadframe systems may include a die pad, a semiconductor die coupled to the die pad, where the semiconductor die has a perimeter. A leadframe may be coupled over the die pad and the semiconductor die where the leadframe has a solder dam coupled around the semiconductor die and, the solder dam has a perimeter that corresponds with the semiconductor die The die pad may have no groove adjacent to the semiconductor die.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: August 24, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi Inoguchi, Isao Ochiai, Takayuki Taguchi
  • Publication number: 20200312748
    Abstract: Leadframe systems and related methods. Specific implementations of leadframe systems may include a die pad, a semiconductor die coupled to the die pad, where the semiconductor die has a perimeter. A leadframe may be coupled over the die pad and the semiconductor die where the leadframe has a solder dam coupled around the semiconductor die and, the solder dam has a perimeter that corresponds with the semiconductor die The die pad may have no groove adjacent to the semiconductor die.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 1, 2020
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi INOGUCHI, Isao OCHIAI, Takayuki TAGUCHI
  • Patent number: 10361148
    Abstract: In a general aspect, a semiconductor device package assembly can include a first leadframe portion. The first leadframe portion can have a recessed region defined therein. The recessed region can have a sidewall and a bottom. The assembly can also include a second leadframe portion that is press-fit into the recessed region, such that a bottom surface of the second leadframe portion is in contact with the bottom of the recessed region. The second leadframe portion can be retained in the recessed region by mechanical force between an outer surface of the second leadframe portion and an inner surface of the sidewall, where the outer surface of the second leadframe portion can be in contact with the inner surface of the sidewall.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: July 23, 2019
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Isao Ochiai, Hiroshi Inoguchi
  • Patent number: 9699915
    Abstract: In accordance with an embodiment, a method for manufacturing an electric circuit that includes providing a support having a first region, the first region having a first conductor that has a first sidewall and a second conductor that has a second sidewall, wherein the first conductor is electrically isolated from the second conductor is provided. A distance between the first sidewall and the second sidewall is increased using a technique such as stamping, etching, or trimming. A first circuit element is coupled to the first conductor and encapsulated in a mold compound. In accordance with another embodiment, an electric circuit includes a support having interconnect with sidewalls wherein notches extend from one or more of the sidewalls into the interconnect. A circuit element is coupled to the interconnect by a bonding agent and protected by a protective structure.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: July 4, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Hiroshi Inoguchi, Takayuki Taguchi
  • Publication number: 20160105964
    Abstract: In accordance with an embodiment, a method for manufacturing an electric circuit that includes providing a support having a first region, the first region having a first conductor that has a first sidewall and a second conductor that has a second sidewall, wherein the first conductor is electrically isolated from the second conductor is provided. A distance between the first sidewall and the second sidewall is increased using a technique such as stamping, etching, or trimming. A first circuit element is coupled to the first conductor and encapsulated in a mold compound. In accordance with another embodiment, an electric circuit includes a support having interconnect with sidewalls wherein notches extend from one or more of the sidewalls into the interconnect. A circuit element is coupled to the interconnect by a bonding agent and protected by a protective structure.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 14, 2016
    Inventors: Hiroshi Inoguchi, Takayuki Taguchi
  • Patent number: 7531785
    Abstract: In a circuit device having a circuit element housed in a case, a rise of air pressure and occurrence of condensation in the case are prevented. A circuit device of the present invention includes a case formed of a bottom part and a side part, and a cover part covering an upper surface of the side part. In an internal space of the case, a circuit element such as a semiconductor element is housed. In a bottom part of the case, a land and leads are buried. A communicating part which causes the internal space of the case to communicate with an outside of the case is provided in the land. By providing the communicating part, the rise of air pressure and occurrence of condensation in the internal space due to change in temperature are suppressed. Furthermore, in the land made of metal, the communicating part can be easily formed by etching or the like.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: May 12, 2009
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventor: Hiroshi Inoguchi
  • Patent number: 7317199
    Abstract: To provide a circuit device suitable for incorporating a semiconductor element emitting or receiving short-wavelength light. The circuit device includes a casing, a semiconductor element, and a cover portion. The casing has an opening on the top face thereof. The semiconductor element is incorporated in the casing and emits or receives light. The cover portion is made of a material transparent to the light and covers the opening. In the periphery of the opening, a concave portion is provided, and a portion of the cover portion with a certain thickness on the bottom side is accommodated in the concave portion. Since the portion of the cover portion with the certain thickness on the bottom side is accommodated in the concave portion provided in the upper portion of the casing, the position of the cover portion is accurately fixed. Accordingly, it is possible to obtain accurate relative positions of the semiconductor element accommodated within the casing and the cover portion.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: January 8, 2008
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductor Co., Ltd.
    Inventor: Hiroshi Inoguchi
  • Patent number: 7307288
    Abstract: A semiconductor device capable of incorporating an element configured to accept and emit light having a short wavelength and a manufacturing method thereof are provided. A semiconductor element is housed in an enclosure which includes a bottom portion and side portions and having an aperture on an upper part thereof. Leads are buried in the bottom portion, and an end of each of the leads is arranged so as to approach the semiconductor element. The semiconductor element is connected to the leads by use of metal wires. The aperture of the enclosure is covered with a lid made of a transparent material for transmitting light accepted or emitted by the semiconductor element.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: December 11, 2007
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventor: Hiroshi Inoguchi
  • Publication number: 20070001102
    Abstract: In a circuit device having a circuit element housed in a case, a rise of air pressure and occurrence of condensation in the case are prevented. A circuit device of the present invention includes a case formed of a bottom part and a side part, and a cover part covering an upper surface of the side part. In an internal space of the case, a circuit element such as a semiconductor element is housed. In a bottom part of the case, a land and leads are buried. A communicating part which causes the internal space of the case to communicate with an outside of the case is provided in the land. By providing the communicating part, the rise of air pressure and occurrence of condensation in the internal space due to change in temperature are suppressed. Furthermore, in the land made of metal, the communicating part can be easily formed by etching or the like.
    Type: Application
    Filed: June 23, 2006
    Publication date: January 4, 2007
    Inventor: Hiroshi Inoguchi
  • Publication number: 20050248009
    Abstract: To provide a circuit device suitable for incorporating a semiconductor element emitting or receiving short-wavelength light. The circuit device includes a casing, a semiconductor element, and a cover portion. The casing has an opening on the top face thereof. The semiconductor element is incorporated in the casing and emits or receives light. The cover portion is made of a material transparent to the light and covers the opening. In the periphery of the opening, a concave portion is provided, and a portion of the cover portion with a certain thickness on the bottom side is accommodated in the concave portion. Since the portion of the cover portion with the certain thickness on the bottom side is accommodated in the concave portion provided in the upper portion of the casing, the position of the cover portion is accurately fixed. Accordingly, it is possible to obtain accurate relative positions of the semiconductor element accommodated within the casing and the cover portion.
    Type: Application
    Filed: February 14, 2005
    Publication date: November 10, 2005
    Inventor: Hiroshi Inoguchi
  • Publication number: 20050093129
    Abstract: A semiconductor device capable of incorporating an element configured to accept and emit light having a short wavelength and a manufacturing method thereof are provided. A semiconductor element is housed in an enclosure which includes a bottom portion and side portions and having an aperture on an upper part thereof. Leads are buried in the bottom portion, and an end of each of the leads is arranged so as to approach the semiconductor element. The semiconductor element is connected to the leads by use of metal wires. The aperture of the enclosure is covered with a lid made of a transparent material for transmitting light accepted or emitted by the semiconductor element.
    Type: Application
    Filed: September 8, 2004
    Publication date: May 5, 2005
    Inventor: Hiroshi Inoguchi
  • Patent number: 6606174
    Abstract: In a data transmission, a driving circuit 14 drives a light receiving element 15 in accordance with data from an external control circuit. In accordance with IrDA or remote control communication, driving capability of the driving circuit is changed. In a data reception, received data is transferred to a first or a second signal processing circuit in accordance with the IrDA or remote control communication and processed according to each communication format. In this configuration, a single light emitting or light receiving element permits data communication in different kinds of data communication formats.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: August 12, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsutomu Ishikawa, Satoru Sekiguchi, Hiroshi Kobori, Kiyokazu Kamado, Hideo Kunio, Isao Ochiai, Kiyoshi Takada, Hiroshi Inoguchi
  • Patent number: 6252252
    Abstract: A mold 25 for molding semiconductor chips 23 and 24 serving as a light emitting element and a light receiving element, respectively, is made of a material capable of transmitting light. A groove 27 is formed on the region where light is emitted from and incident on the semiconductor chips so that it constitutes a reflecting face. Thus, the light is emitted and incident through the side E of the mold. In this configuration, the outer size of the light receiving element or light emitting element can be minimized, and the module provided with these semiconductor chips can also be miniaturized.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: June 26, 2001
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hideo Kunii, Toshiyuki Take, Hiroshi Inoguchi, Tsutomu Ishikawa, Masashi Arai, Hiroshi Kobori, Hiroki Seyama, Kiyoshi Takada, Satoru Sekiguchi
  • Patent number: 5101880
    Abstract: A flaskless casting line includes a conveyer apparatus for intermittently transferring a flaskless sand mold row, a casting take-out apparatus having a take-out arm, a sand mold top surface sensor for detecting a sprue of sand molds constituting the flaskless sand mold row, a sprue position detecting apparatus, and a take-out arm driving means. Since the sand mold top surface sensor is disposed over an end of the conveyer apparatus on an upstream side with respect to the casting take-out apparatus, the casting take-out apparatus can be guided to an optimum casting take-out position calculated from a sprue position which is detected by the sprue position detecting apparatus. As a result, it is possible to automate the flaskless casting line as well as the following handling operation.
    Type: Grant
    Filed: October 25, 1990
    Date of Patent: April 7, 1992
    Assignee: Aisin Takaoka Co., Ltd.
    Inventors: Yoshikazu Fujiwara, Eiichi Tomita, Hiroshi Inoguchi