Abstract: An oxide material characterized by that it has a perovskite structure comprising an oxide represented by ABO3, (Bi2O2)2+ (Am?1BmO3m+1)2? wherein A represents one kind or two or more kinds of ions selected from the group consisting of Li+, Na+, K+, Pb2+, Ca2+, Sr2+, Ba2+, Bi3+, Y3+, Mn3+ and La3+, B represents one kind or two or more kinds of ions selected from the group consisting of Ru3+, Fe3+, Ti4+, Zr4+, Cu4+, Nb5+, Ta5+, V5+, W6+ and Mo6+, and m represents a natural number of 1 or more, LnBa2Cu3O7, Z2Ba2Can?1CunO2n+4 or ZBa2Can?1CunO2n+3, wherein Ln represents one kind or two or more kinds of ions selected from the group consisting of Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, Z represents one kind or two or more kinds of ions selected from the group consisting of Bi, Tl and Hg, and n represents a natural number of from 1 to 5; and a catalytic substance containing one or more kinds of elements selected from the group consisting of Si, Ge and Sn.

Abstract: The present invention provides compositional buffers for electronic ceramics containing volatile elements, and a method for manufacturing and using the same. The surfaces of the fine crystal grains that make up an electronic ceramic such as a bismuth-based laminar compound or lead-based perovskite compound containing highly volatile cations such as bismuth or lead, or a thin film thereof, are covered compositional buffer composed of a silicate- or borate-based compound that readily forms an amorphous structure, and also provided is a method for manufacturing an electronic ceramic using the compositional buffer.

Abstract: An oxide material characterized by that it has a perovskite structure comprising an oxide represented by ABO3, (Bi2O2)2+(Am−1BmO3m+1)2− wherein A represents one kind or two or more kinds of ions selected from the group consisting of Li+, Na+, K+, Pb2+, Ca2+, Sr2+, Ba2+, Bi3+, Y3+, Mn3+ and La3+, B represents one kind or two or more kinds of ions selected from the group consisting of Ru3+, Fe3+, Ti4+, Zr4+, Cu4+, Nb5+, Ta5+, V5+, W6+ and Mo6+, and m represents a natural number of 1 or more, LnBa2Cu3O7, Z2Ba2Can−1CunO2n+4 or ZBa2Can−1CunO2n+3, wherein Ln represents one kind or two or more kinds of ions selected from the group consisting of Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, Z represents one kind or two or more kinds of ions selected from the group consisting of Bi, Tl and Hg, and n represents a natural number of from 1 to 5; and a cat

Abstract: The present invention provides compositional buffers for electronic ceramics containing volatile elements, and a method for manufacturing the same, as well as a method for manufacturing electronic ceramics using the compositional buffer.

Abstract: A ferroelectric non-volatile memory device comprising a MOS cell transistor, two ferroelectric capacitors each of which has one terminal connected to the gate electrode of the cell transistor and has almost the same remanent polarization, and a selector transistor connected to the other terminal of one ferroelectric capacitor, wherein data is stored by polarizing the ferroelectric thin films of the capacitors in opposite directions with respect to the gate electrode of the cell transistor.

Abstract: A nonvolatile semiconductor memory, including a ferroelectric capacitor connected to the gate of a MOSFET, comprises a silicon thin film formed in stripes on an insulated substrate and having an n+-region, a p-region and an n+-region layered in its thickness direction, a hole formed in a portion of the silicon thin film and extending to the lower n+-region, a gate electrode provided on the side walls of the hole with a gate insulting film interposed therebetween, and a ferroelectric capacitor formed on the silicon thin film and having its lower electrode connected to the gate electrode.

Abstract: Each of memory cells of a ferroelectric nonvolatile memory includes a MOS field effect transistor and first and second ferroelectric capacitors whose remnant polarization amounts are substantially equal to each other. One-side electrodes of the first and second ferroelectric capacitors are connected to the gate electrode of the MOS field effect transistor. Information is stored by polarizing the thin ferroelectric films of the first and second ferroelectric capacitors in opposite directions to each other with respect to the gate electrode of the MOS field effect transistor. Information is read out by applying a positive voltage pulse to one of the other electrodes of the first and second ferroelectric capacitors while the other one of the other electrodes is kept in the electrically floating state. Further a negative voltage pulse having an absolute value smaller than the positive voltage pulse may be applied, if necessary.

Abstract: A ferroelectric non-volatile memory device comprising a MOS cell transistor, two ferroelectric capacitors each of which has one terminal connected to the gate electrode of the cell transistor and has almost the same remanent polarization, and a selector transistor connected to the other terminal of one ferroelectric capacitor, wherein data is stored by polarizing the ferroelectric thin films of the capacitors in opposite directions with respect to the gate electrode of the cell transistor.

Abstract: A ferroelectric non-volatile memory device comprising a MOS cell transistor, two ferroelectric capacitors each of which has one terminal connected to the gate electrode of the cell transistor and has almost the same remanent polarization, and a selector transistor connected to the other terminal of one ferroelectric capacitor, wherein data is stored by polarizing the ferroelectric thin films of the capacitors in opposite directions with respect to the gate electrode of the cell transistor.

Abstract: A nonvolatile semiconductor memory, including a ferroelectric capacitor connected to the gate of a MOSFET, comprises a silicon thin film formed in stripes on an insulated substrate and having an n+-region, a p-region and an n+-region layered in its thickness direction, a hole formed in a portion of the silicon thin film and extending to the lower n+-region, a gate electrode provided on the side walls of the hole with a gate insulting film interposed therebetween, and a ferroelectric capacitor formed on the silicon thin film and having its lower electrode connected to the gate electrode.

Abstract: Each of memory cells of a ferroelectric nonvolatile memory includes a MOS field effect transistor and first and second ferroelectric capacitors whose remnant polarization amounts are substantially equal to each other. One-side electrodes of the first and second ferroelectric capacitors are connected to the gate electrode of the MOS field effect transistor. Information is stored by polarizing the thin ferroelectric films of the first and second ferroelectric capacitors in opposite directions to each other with respect to the gate electrode of the MOS field effect transistor. Information is read out by applying a positive voltage pulse to one of the other electrodes of the first and second ferroelectric capacitors while the other one of the other electrodes is kept in the electrically floating state. Further a negative voltage pulse having an absolute value smaller than the positive voltage pulse may be applied, if necessary.

Abstract: Each of memory cells of a ferroelectric nonvolatile memory includes a MOS field effect transistor and first and second ferroelectric capacitors whose remnant polarization amounts are substantially equal to each other. One-side electrodes of the first and second ferroelectric capacitors are connected to the gate electrode of the MOS field effect transistor. Information is stored by polarizing the thin ferroelectric films of the first and second ferroelectric capacitors in opposite directions to each other with respect to the gate electrode of the MOS field effect transistor. Information is read out by applying a positive voltage pulse to one of the other electrodes of the first and second ferroelectric capacitors while the other one of the other electrodes is kept in the electrically floating state. Further a negative voltage pulse having an absolute value smaller than the positive voltage pulse may be applied, if necessary.