Patents by Inventor Hiroshi Katayanagi
Hiroshi Katayanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240426092Abstract: An information processing apparatus includes a housing in which a distance sensor is placed, fittings attaching the housing to a toilet bowl in a toilet, and a control unit. The sensor measures the distance to an object located in a direction of the inside of a toilet seat installed on the bowl when the seat is placed on the top surface of a rim of the bowl. The control unit detects that a user of the toilet is in a state of sitting on the seat when a first distance being a result of measurement by the sensor is less than a predetermined threshold value. The fittings are components attaching the housing in such a way that the sensor is placed at a position located inside the rim and located under the seat in the vertical direction when the seat is placed on the top surface of the rim.Type: ApplicationFiled: July 4, 2022Publication date: December 26, 2024Applicant: NEC Platforms, Ltd.Inventors: Junpei Kumagai, Keita Yamaguchi, Ikuhiro Aota, Hiroshi Katayanagi, Kazutoshi Ohishi, Takeshi Yamamoto, Hirokazu Kobayashi, Takeyoshi Obara
-
Publication number: 20240366045Abstract: An information collection apparatus includes: a sitting sensor detecting that a user of a toilet bowl in a toilet is sitting on a toilet seat placed on the top surface of a rim of the bowl; an information collector collecting information about an excretion in the bowl; and a housing in which the sensor and the collector are placed. The apparatus includes: a bridge component bridging the inside of the rim and the outside of the rim by placing part of the component on the top surface of the rim of the bowl and sandwiching the rim; and a fitting being attached to an end of the component in a direction of the inside of the rim and attaching the housing. The apparatus includes a change mechanism changing the distance from the end to the housing in a direction along an inner wall forming the inside of the rim.Type: ApplicationFiled: December 20, 2021Publication date: November 7, 2024Applicant: NEC Platforms, Ltd.Inventors: Takeshi Yamamoto, Hirokazu Kobayashi, Junpei Kumagai, Kazutoshi Ohishi, Hiroshi Katayanagi, Keita Yamaguchi, Takeyoshi Obara
-
Patent number: 8922468Abstract: A semiconductor integrated circuit including a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two horizontal scanning lines.Type: GrantFiled: January 21, 2014Date of Patent: December 30, 2014Assignees: Japan Display Inc., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Publication number: 20140132645Abstract: A semiconductor integrated circuit including a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two horizontal scanning lines.Type: ApplicationFiled: January 21, 2014Publication date: May 15, 2014Applicants: Panasonic Liquid Crystal Display Co., Ltd., Japan Display Inc.Inventors: Mitsuru GOTO, Hiroshi KATAYANAGI, Yukihide ODE, Yoshiyuki SAITOU, Koichi KOTERA
-
Patent number: 8633882Abstract: A semiconductor integrated circuit including a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two horizontal scanning lines.Type: GrantFiled: April 9, 2012Date of Patent: January 21, 2014Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Publication number: 20120194574Abstract: A semiconductor integrated circuit including a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two horizontal scanning lines.Type: ApplicationFiled: April 9, 2012Publication date: August 2, 2012Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 8159437Abstract: A semiconductor integrated circuit includes a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor, and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two frame periods.Type: GrantFiled: July 6, 2011Date of Patent: April 17, 2012Assignees: Hitachi Displays, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Publication number: 20110261092Abstract: A semiconductor integrated circuit includes a first register which latches display data, a second register which latches the display data of the first register in accordance with a first clock, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage in accordance with the display data of the second register from the plurality of gray scale voltages, and an amplifier including a first transistor, and a second transistor. A first terminal of the first transistor and a first terminal of the second transistor are connected to a first voltage line, and the gray scale voltage outputted from the decoder is supplied to one of input terminals of the first transistor and the second transistor in accordance with a control signal. A phase of the control signal is reversed at intervals of two frame periods.Type: ApplicationFiled: July 6, 2011Publication date: October 27, 2011Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 7990355Abstract: A semiconductor integrated circuit includes a first register, a second register, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage, and an amplifier including a first transistor, a second transistor, a third transistor, and a fourth transistor. A first terminal of the first transistor and a first terminal of the second transistors are connected to a first voltage line, a first terminal of the third transistor and a first terminal of the fourth transistor are connected to a second voltage line, a second terminal of the first transistor is connected to a second terminal of the third transistor, and a second terminal of the second transistor is connected to a second terminal of the fourth transistor.Type: GrantFiled: November 3, 2010Date of Patent: August 2, 2011Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 7964870Abstract: To provide a display device capable of reliably forming a resistive element formed on a substrate including pixels. A display device including at least a thin-film transistor and a resistive element on a substrate has a gate electrode, an insulating film, a semiconductor layer and a conductive layer which are sequentially stacked on the substrate, in which the resistive element is formed by using the semiconductor layer formed between end portions of wiring made of the conductive layer as a resistive body, and at least one conductive layer apart from the end portions is formed on the semiconductor layer between the end portions of wiring.Type: GrantFiled: June 2, 2008Date of Patent: June 21, 2011Assignee: Panasonic Liquid Crystal Display Co., Ltd.Inventors: Tsuyoshi Uchida, Hiroshi Katayanagi
-
Publication number: 20110043550Abstract: A semiconductor integrated circuit includes a first register, a second register, a gray scale voltage generator which outputs a plurality of gray scale voltages, a decoder which selects a gray scale voltage, and an amplifier including a first transistor, a second transistor, a third transistor, and a fourth transistor. A first terminal of the first transistor and a first terminal of the second transistors are connected to a first voltage line, a first terminal of the third transistor and a first terminal of the fourth transistor are connected to a second voltage line, a second terminal of the first transistor is connected to a second terminal of the third transistor, and a second terminal of the second transistor is connected to a second terminal of the fourth transistor.Type: ApplicationFiled: November 3, 2010Publication date: February 24, 2011Inventors: Mitsuro Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 7830347Abstract: A liquid crystal display device includes drain signal lines, gate signal lines, thin film transistors, and a drain driver. The drain driver includes an amplifier circuit having a switching circuit which switches between a first state and a second state, the first state being a state where a first input terminal of the amplifier circuit is coupled to an inverting input terminal and a second input terminal is coupled to a noninverting input terminal, and the second state being a state where the first input terminal is coupled to the noninverting input terminal and the second input terminal is coupled to the inverting input terminal. The amplifier circuit supplies signal voltages to the thin film transistors via the drain signal lines which are gray scale voltages one of plus and minus offset voltages in a first frame and in a second frame.Type: GrantFiled: September 27, 2007Date of Patent: November 9, 2010Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi Ulsi Systems Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Publication number: 20080296576Abstract: To provide a display device capable of reliably forming a resistive element formed on a substrate including pixels. A display device including at least a thin-film transistor and a resistive element on a substrate has a gate electrode, an insulating film, a semiconductor layer and a conductive layer which are sequentially stacked on the substrate, in which the resistive element is formed by using the semiconductor layer formed between end portions of wiring made of the conductive layer as a resistive body, and at least one conductive layer apart from the end portions is formed on the semiconductor layer between the end portions of wiring.Type: ApplicationFiled: June 2, 2008Publication date: December 4, 2008Inventors: Tsuyoshi Uchida, Hiroshi Katayanagi
-
Patent number: 7417614Abstract: A liquid crystal display device having a liquid crystal display element having a plurality of pixels. The video signal line driver circuit includes a plurality of amplifiers each of which has a pair of a first input terminal and a second input terminal, and a plurality of pairs of an inverting input terminal and a noninverting input terminal. Each of the plurality of amplifiers has a switching circuit which switches between a first state and a second state, based on a switching control signal supplied with a switching repetition period equal to double a display line repetition period.Type: GrantFiled: April 27, 2004Date of Patent: August 26, 2008Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi Ulsi Systems Co., ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Publication number: 20080024419Abstract: A liquid crystal display device includes drain signal lines, gate signal lines, thin film transistors, and a drain driver. The drain driver includes an amplifier circuit having a switching circuit which switches between a first state and a second state, the first state being a state where a first input terminal of the amplifier circuit is coupled to an inverting input terminal and a second input terminal is coupled to a noninverting input terminal, and the second state being a state where the first input terminal is coupled to the noninverting input terminal and the second input terminal is coupled to the inverting input terminal. The amplifier circuit supplies signal voltages to the thin film transistors via the drain signal lines which are gray scale voltages one of plus and minus offset voltages in a first frame and in a second frame.Type: ApplicationFiled: September 27, 2007Publication date: January 31, 2008Inventors: Mitsuru GOTO, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 6924782Abstract: A liquid crystal display device has a semiconductor integrated circuit capable of outputting a voltage equal to or higher than the source-drain withstand voltage of a component transistor. A switching circuit has first conducting-type first and second transistors connected in series between a first input terminal and a common output terminal and second conducting-type third and fourth transistors connected between a second input terminal and the common output terminal and a switching control circuit for controlling the switching circuit. The switching control circuit applies first and second bias voltages for turning on the second and fourth transistors to the gate electrodes of the second and fourth transistors, and applies a control voltage for selectively turning on/off the first or third transistor to the gate electrodes of the first and third transistors.Type: GrantFiled: October 30, 1998Date of Patent: August 2, 2005Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Takahiro Fujioka, Kazunari Kurokawa, Hiroshi Katayanagi, Mitsuru Goto, Yukihide Ode, Akira Ogura, Kentaro Agata
-
Publication number: 20040196231Abstract: A liquid crystal display device having a liquid crystal display element having a plurality of pixels. The video signal line driver circuit includes a plurality of amplifiers each of which has a pair of a first input terminal and a second input terminal, and a plurality of pairs of an inverting input terminal and a noninverting input terminal. Each of the plurality of amplifiers has a switching circuit which switches between a first state and a second state, based on a switching control signal supplied with a switching repetition period equal to double a display line repetition period.Type: ApplicationFiled: April 27, 2004Publication date: October 7, 2004Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 6731263Abstract: Each video signal driver circuit in a liquid crystal display device includes a first amplifier circuit with a first output terminal and first and second input terminals; a second amplifier circuit with a second output terminal and third and fourth input terminals; a first connecting circuit switchable between a first connection wherein an output voltage from the first output terminal is input to the first input terminal as a reference voltage, and a second connection wherein the output voltage from the first output terminal is input to the second input terminal as a reference voltage; and a second connecting circuit switchable between a third connection wherein an output voltage from the second output terminal is input to the third input terminal as a reference voltage, and a fourth connection wherein the output voltage from the second output terminal is input to the fourth input terminal as a reference voltage.Type: GrantFiled: May 14, 2002Date of Patent: May 4, 2004Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Mitsuru Goto, Hiroshi Katayanagi, Yukihide Ode, Yoshiyuki Saitou, Koichi Kotera
-
Patent number: 6518946Abstract: A liquid crystal display device including a liquid crystal panel having a plurality of pixels, a driving circuit applying a video signal voltage to each of the pixels in accordance with display data. The driving circuit has a first circuit, a second circuit, and a switching circuit which connects an output terminal of the first circuit with an input terminal of the second circuit. The first circuit outputs a first voltage and a second voltage in accordance with first display data, and outputs the second voltage and a third voltage in accordance with second display data. The second voltage is lower than the first voltage, and the third voltage is lower than the second voltage.Type: GrantFiled: May 11, 2001Date of Patent: February 11, 2003Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.Inventors: Yukihide Ode, Akira Ogura, Kentaro Agata, Kazunari Kurokawa, Takahiro Fujioka, Hiroshi Katayanagi, Mitsuru Goto
-
Patent number: D1010804Type: GrantFiled: April 12, 2021Date of Patent: January 9, 2024Assignee: NEC PLATFORMS, LTD.Inventors: Kazuhiro Kakehata, Hiroshi Katayanagi, Ikuhiro Aota