Patents by Inventor Hiroshi Kirihara

Hiroshi Kirihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9220144
    Abstract: A time-division control circuit individually controls an effective voltage supplied to each lighting load by adjusting the periods during which switching circuits connected to N sets of lighting loads are kept on. A zero-cross signal having a value that changes at the zero-cross point of the AC voltage is generated. An oscillation signal is generated with a frequency equal to, or an integer multiple of the AC frequency. The phase difference between the zero-cross signal and the oscillation signal is measured and a common reference point that defines the timing for turning the switching circuits ON or OFF is determined on the basis of the measured phase difference. An ON/OFF signal for each switching circuit is transmitted at a timing for each of the N sets of switching circuits on the basis of the reference point and the effective voltage to be supplied to the lighting load.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: December 22, 2015
    Assignee: ELM INC.
    Inventors: Takakazu Miyahara, Hiroshi Kirihara, Mitsuhiro Hashiguchi
  • Publication number: 20150156842
    Abstract: A time-division control circuit individually controls an effective voltage supplied to each lighting load by adjusting the periods during which switching circuits connected to N sets of lighting loads are kept on. A zero-cross signal having a value that changes at the zero-cross point of the AC voltage is generated. An oscillation signal is generated with a frequency equal to, or an integer multiple of the AC frequency. The phase difference between the zero-cross signal and the oscillation signal is measured and a common reference point that defines the timing for turning the switching circuits ON or OFF is determined on the basis of the measured phase difference. An ON/OFF signal for each switching circuit is transmitted at a timing for each of the N sets of switching circuits on the basis of the reference point and the effective voltage to be supplied to the lighting load.
    Type: Application
    Filed: May 14, 2013
    Publication date: June 4, 2015
    Inventors: Takakazu Miyahara, Hiroshi Kirihara, Mitsuhiro Hashiguchi
  • Patent number: 8618743
    Abstract: The present invention is aimed at providing a dimmer capable of preventing malfunctions due to noise contamination or waveform distortion of the voltage of an AC power source.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: December 31, 2013
    Assignee: ELM Inc.
    Inventors: Takakazu Miyahara, Hiroshi Kirihara, Mitsuhiro Hashiguchi
  • Publication number: 20130300301
    Abstract: The present invention is aimed at providing a dimmer capable of preventing malfunctions due to noise contamination or waveform distortion of the voltage of an AC power source.
    Type: Application
    Filed: November 16, 2011
    Publication date: November 14, 2013
    Inventors: Takakazu Miyahara, Hiroshi Kirihara, Mitsuhiro Hashiguchi
  • Publication number: 20090022893
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Application
    Filed: September 24, 2008
    Publication date: January 22, 2009
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Patent number: 7449076
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: November 11, 2008
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Patent number: 7273654
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: September 25, 2007
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Publication number: 20060027312
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Application
    Filed: October 4, 2005
    Publication date: February 9, 2006
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Patent number: 6621170
    Abstract: The present invention aims at an improvement in temperature-cycle resistance after packaging in semiconductor devices and also an improvement in moisture-absorbed reflow resistance, and provides an adhesive having a storage elastic modulus at 25° C. of from 10 to 2,000 MPa and a storage elastic modulus at 260° C. of from 3 to 50 MPa as measured with a dynamic viscoelastic spectrometer, and also a double-sided adhesive film, a semiconductor device and a semiconductor chip mounting substrate which make use of the adhesive, and their production process.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: September 16, 2003
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Kazunori Yamamoto, Yasushi Shimada, Yasushi Kumashiro, Teiichi Inada, Hiroyuki Kuriya, Aizo Kaneda, Takeo Tomiyama, Yoshihiro Nomura, Yoichi Hosokawa, Hiroshi Kirihara, Akira Kageyama
  • Patent number: 6523446
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: February 25, 2003
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Publication number: 20030021990
    Abstract: A punched adhesive tape for semiconductor which is made by punching an adhesive tape comprising a base film and an adhesive layer provided on one or each side of the base film to mark the regions in the adhesive tape where contaminants or defects are contained; a method of producing an adhesive tape-bearing lead frame by punching the punched adhesive tape for semiconductor, with the parts containing the punched holes skipped over, and applying the adhesive tape pieces punched out from the punched adhesive tape for semiconductor to a lead frame; a semiconductor device fabricated by using the adhesive-bearing lead frame.
    Type: Application
    Filed: September 19, 2002
    Publication date: January 30, 2003
    Inventors: Yoshiyuki Tanabe, Yoshihiro Nomura, Hiroshi Kirihara, Youichi Hosokawa, Shinji Iioka, Satoru Yanagisawa
  • Publication number: 20010022404
    Abstract: The present invention aims at an improvement in temperature-cycle resistance after packaging in semiconductor devices and also an improvement in moisture-absorbed reflow resistance, and provides an adhesive having a storage elastic modulus at 25° C. of from 10 to 2,000 MPa and a storage elastic modulus at 260° C. of from 3 to 50 MPa as measured with a dynamic viscoelastic spectrometer, and also a double-sided adhesive film, a semiconductor device and a semiconductor chip mounting substrate which make use of the adhesive, and their production process.
    Type: Application
    Filed: April 26, 2001
    Publication date: September 20, 2001
    Applicant: Hitachi Chemical Company Ltd.
    Inventors: Kazunori Yamamoto, Yasushi Shimada, Yasushi Kumashiro, Teiichi Inada, Hiroyuki Kuriya, Aizo Kaneda, Takeo Tomiyama, Yoshihiro Nomura, Yoichi Hosokawa, Hiroshi Kirihara, Akira Kageyama
  • Patent number: 6265782
    Abstract: The present invention aims at an improvement in temperature-cycle resistance after packaging in semiconductor devices and also an improvement in moisture-absorbed reflow resistance, and provides an adhesive having a storage elastic modulus at 25° C. of from 10 to 2,000 MPa and a storage elastic modulus at 260° C. of from 3 to 50 MPa as measured with a dynamic viscoelastic spectrometer, and also a double-sided adhesive film, a semiconductor device and a semiconductor chip mounting substrate which make use of the adhesive, and their production process.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: July 24, 2001
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Kazunori Yamamoto, Yasushi Shimada, Yasushi Kumashiro, Teiichi Inada, Hiroyuki Kuriya, Aizo Kaneda, Takeo Tomiyama, Yoshihiro Nomura, Yoichi Hosokawa, Hiroshi Kirihara, Akira Kageyama