Patents by Inventor Hiroshi Kishibe

Hiroshi Kishibe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8687452
    Abstract: A semiconductor memory device pertaining to the present invention includes a plurality of memory macros having memory cells and memory peripheral circuits which drive the memory cells; first power supply switches which control power supply to the memory cells; and a second power supply switch which controls power supply to the memory peripheral circuits. The first power supply switches are located within the memory macros, respectively, and provided between a power supply line feeding power to the memory cells and the memory cells. The second power supply switch is located outside the memory macros and provided between the power supply line and a common power supply wiring for the memory peripheral circuits in the plurality of memory macros.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: April 1, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Kishibe
  • Patent number: 8339892
    Abstract: A semiconductor memory device pertaining to the present invention includes a plurality of memory macros having memory cells and memory peripheral circuits which drive the memory cells; first power supply switches which control power supply to the memory cells; and a second power supply switch which controls power supply to the memory peripheral circuits. The first power supply switches are located within the memory macros, respectively, and provided between a power supply line feeding power to the memory cells and the memory cells. The second power supply switch is located outside the memory macros and provided between the power supply line and a common power supply wiring for the memory peripheral circuits in the plurality of memory macros.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: December 25, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Kishibe
  • Patent number: 7178122
    Abstract: Placement is performed by using a library created by enlarging cell frames of at least one type of cells out of a plurality of types of standard cells constituted by using transistors having different characteristics for the respective types of cell. More preferably, the overlap between cells is judged by using unenlarged cell frames as adjacent boundaries for standard cells of the same type, and the overlap between cells is judged by using enlarged cell frames as adjacent boundaries for standard cells of different types. This enables automatic placement in which different types of cells are mixed.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: February 13, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Hiroshi Kishibe
  • Publication number: 20040168143
    Abstract: Placement is performed by using a library created by enlarging cell frames of at least one type of cells out of a plurality of types of standard cells constituted by using transistors having different characteristics for the respective types of cell. More preferably, the overlap between cells is judged by using unenlarged cell frames as adjacent boundaries for standard cells of the same type, and the overlap between cells is judged by using enlarged cell frames as adjacent boundaries for standard cells of different types. This enables automatic placement in which different types of cells are mixed.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 26, 2004
    Applicant: NEC Electronics Corporation
    Inventor: Hiroshi Kishibe