Patents by Inventor Hiroshi Masuda

Hiroshi Masuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7074089
    Abstract: A card connector system that detachably supports a PC card and electrically connects the PC card to an electrical device. The system includes a temperature sensor to monitor temperature of the PC card to prevent the deleterious effect of heat generated by the PC card on the PC card itself and the electrical device. The sensor detects the surface temperature of the supported PC card and transmits the obtained temperature information to the electrical device. In this case, it is preferable that a transition board 33, electrically connected between the PC card and the electrical device, is used to transmit the temperature information.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: July 11, 2006
    Assignee: FCI Americas Technology, Inc.
    Inventors: Motomo Kajiura, Ryosuke Takahashi, Hiroshi Masuda
  • Publication number: 20060112413
    Abstract: The present invention relates to an image processing system, a device and a method for image pickup, a recording medium, and a program that make it possible to transfer a large amount of image data to another apparatus efficiently. A digital camera 1 transfers image data to a server 5 after transferring thumbnail image data yet to be transferred to the server 5. When new thumbnail image data is generated during the transfer of the image data, the transfer of the image data is stopped, and the new thumbnail image data is transferred first. Obtaining the thumbnail image data, the server 5 displays the thumbnail images on a display, receives a request for the transfer of image data from a user, and then supplies the request to the digital camera 1. The digital camera 1 transfers the image data to the server 5 on the basis of the request. The present invention is applicable to digital still cameras.
    Type: Application
    Filed: July 28, 2003
    Publication date: May 25, 2006
    Applicant: Sony Corporation
    Inventors: Masaki Ando, Hiroshi Masuda, Osamu Date
  • Publication number: 20060021639
    Abstract: A substrate processing apparatus includes a photosensor for detecting the presence/absence of a substrate in each place within a carrier cassette, a pair of processing tanks for performing the same process at the same time, and a supply mechanism for supplying a processing solution to the processing tanks independently. The number of substrates is detected in accordance with the result of the detection of the photosensor. If the number of substrates detected is not greater than an allowable number for one of the processing tanks, the processing solution is supplied to only the one processing tank to perform the process. This reduces the consumption of the processing solution in a batch process.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 2, 2006
    Inventors: Hiroshi Masuda, Hiroyuki Araki
  • Patent number: 6956568
    Abstract: Umbilics of two surfaces are compared and it is determined from this comparison whether the suspect surface is a copy of the original surface based on the comparison. Comparing umbilics includes determining whether locations of the umbilics of the suspect surface match within a specified margin umbilics of the original surface, and determining whether pattern types of umbilics of the suspect surface match pattern types of corresponding umbilics of the original surface. A “weak” test may be performed, in which corresponding points on the two surfaces are compared, wherein the comparison of umbilics is performed if corresponding points of the two surfaces are located within a specified margin of each other. The points may be gridpoints on wireframes, which in turn may be based on lines of curvature of the surfaces. Comparing umbilics is performed if it is determined that each surface has at least one umbilic.
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: October 18, 2005
    Assignee: Massachussetts Institute of Technology
    Inventors: Takashi Maekawa, Nicholas M. Patrikalakis, Franz-Erich Wolter, Hiroshi Masuda
  • Publication number: 20050213968
    Abstract: An optical transmission apparatus comprising a first detector for detecting the power of the supervisory signal light separated from received wavelength-division multiplexed signal lights; a second detector for detecting the power of the wavelength-division multiplexed signal lights after the separation of the supervisory signal light; a gain-controlled type optical amplifier for amplifying the wavelength-division multiplexed signal lights; an optical attenuator coupled to the amplifier; and a control unit for controlling the optical amplifier and the optical attenuator so as to keep the output level of the wavelength-division multiplexed signal lights to a predetermined target value, wherein the control unit restrains automatic output level control by the optical attenuator when the supervisory signal light power fluctuates within its permissible range and fluctuations in the signal light power have deviated from its permissible range.
    Type: Application
    Filed: December 23, 2004
    Publication date: September 29, 2005
    Inventors: Tetsuya UDA, Kenta Noda, Yasuhiro Uchiyama, Hiroshi Masuda, Hiroyuki Nakano
  • Publication number: 20050041918
    Abstract: The present invention provides an optical waveguide which comprises a core 4 for incident light and a core 5 for outgoing light, wherein the width of the core 5 for outgoing light is more than 1.5 times that of the core 4 for incident light. This optical waveguide permits the multiplexing and/or demultiplexing of light rays even when the wavelengths thereof undergo changes within the range of about 10 nm. In addition, the present invention further provides an optical multiplexer-demultiplexer which comprises the combination of an optical waveguide serving as an optical path and a diffraction grating for demultiplexing and focusing light, wherein the absolute value of the difference between the refractive index (nTE) of the core layer of the optical waveguide in the direction parallel to the plane of the film and that (nTM) of the core layer thereof in the direction perpendicular to the plane of the film is not more than 0.007 at the wavelength used.
    Type: Application
    Filed: September 27, 2004
    Publication date: February 24, 2005
    Applicant: Hitachi Chemical Co., Itd.
    Inventors: Tomoaki Shibata, Hiroshi Masuda, Yasushi Sugimoto, Tetsuya Hoshino
  • Patent number: 6853056
    Abstract: Disclosed is a semiconductor device which has a semiconductor chip; a base metal lead frame with no residual of a rustproof film, including a die pad mounted with said semiconductor chip, and a plurality of leads disposed so that inner ends of said leads are positioned along the periphery of said die pad, copper wires to directly connect electrodes on said semiconductor chip to the inner ends of said plurality of leads; and a resin molded member to hermetically seal said semiconductor chip, a large proportion of said lead frame and said copper wires; wherein an initial detachment area of said resin molded member at the bottom side of the die pad is 20% or less to the whole die pad area.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: February 8, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadao Fukatani, Hiroshi Masuda, Koji Motonami
  • Patent number: 6815338
    Abstract: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: November 9, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Domae, Hiroshi Masuda, Yoshiaki Kato, Kousaku Yano
  • Publication number: 20040212049
    Abstract: A semiconductor device comprises: a semiconductor chip; a base metal lead frame with no residual of a rustproof film, including a die pad mounted with said semiconductor chip, and a plurality of leads disposed so that inner ends of said leads are positioned along the periphery of said die pad; copper wires to directly connect electrodes on said semiconductor chip to the inner ends of said plurality of leads; and a resin molded member to hermetically seal said semiconductor chip, a large proportion of said lead frame and said copper wires.
    Type: Application
    Filed: May 26, 2004
    Publication date: October 28, 2004
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tadao Fukatani, Hiroshi Masuda, Koji Motonami
  • Publication number: 20040203276
    Abstract: A card connector system that detachably supports a PC card and electrically connects the PC card to an electrical device. The system includes a temperature sensor to monitor temperature of the PC card to prevent the deleterious effect of heat generated by the PC card on the PC card itself and the electrical device. The sensor detects the surface temperature of the supported PC card and transmits the obtained temperature information to the electrical device. In this case, it is preferable that a transition board 33, electrically connected between the PC card and the electrical device, is used to transmit the temperature information.
    Type: Application
    Filed: May 3, 2004
    Publication date: October 14, 2004
    Applicant: Berg Technology, Inc.
    Inventors: Motomo Kajiura, Ryosuke Takahashi, Hiroshi Masuda
  • Publication number: 20040201104
    Abstract: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.
    Type: Application
    Filed: May 4, 2004
    Publication date: October 14, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shinichi Domae, Hiroshi Masuda, Yoshiaki Kato, Kousaku Yano
  • Publication number: 20040194748
    Abstract: The invention provides a control method of intending to improve a heat efficiency by an Atkinson cycle, improve a charging efficiency, improve an efficiency of a supercharger and increase a freedom of cam design. In particular, the invention relates to a control method of opening and closing a valve in an internal combustion engine with supercharger. An effective compression ratio is decreased by temporarily re-opening an exhaust valve in a compression stroke first stage, whereby a heat efficiency is improved without excessively increasing a cylinder internal pressure. Preferably, an exhaust valve re-opening time is set such that the effective compression ratio/expansion ratio is within a range from 0.5 to 0.9. Further, an exhaust valve is not temporarily opened in a compression stroke first stage, at a time of starting or driving under a low load, and the Atkinson cycle in accordance with the re-opening of the exhaust valve is achieved at a time of driving under a high load.
    Type: Application
    Filed: March 2, 2004
    Publication date: October 7, 2004
    Applicant: Yanmar Co., Ltd.
    Inventors: Gou Asai, Toshikazu Imamori, Hiroshi Masuda
  • Patent number: 6780060
    Abstract: A card connector system that detachably supports a PC card and electrically connects the PC card to an electrical device. The system includes a temperature sensor to monitor temperature of the PC card to prevent the deleterious effect of heat generated by the PC card on the PC card itself and the electrical device. The sensor detects the surface temperature of the supported PC card and transmits the obtained temperature information to the electrical device. In this case, it is preferable that a transition board 33, electrically connected between the PC card and the electrical device, is used to transmit the temperature information.
    Type: Grant
    Filed: August 14, 2000
    Date of Patent: August 24, 2004
    Assignee: FCI Americas Technology, Inc.
    Inventors: Motomo Kajiura, Ryosuke Takahashi, Hiroshi Masuda
  • Patent number: 6755792
    Abstract: An apparatus for examining arteriosclerosis of a living subject, including a pulse-wave detecting device which detects a pulse wave from a first portion of the subject, a stenosis-related-information obtaining device for obtaining, based on a shape of the pulse wave detected by the pulse-wave detecting device, stenosis-related information that changes in relation with stenosis of an artery of a second portion of the subject that is located upstream of the first portion of the subject in a direction in which blood flows in the artery, and a stenosis judging device for making, based on the stenosis-related information obtained by the stenosis-related-information obtaining device, a judgment about the stenosis of the artery of the second portion of the subject.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: June 29, 2004
    Assignee: Colin Medical Technology Corporation
    Inventors: Hiroshi Masuda, Toshihiko Ogura, Takashi Honda, Akira Tampo, Kiyoyuki Narimatsu
  • Patent number: 6754352
    Abstract: A sound-field production apparatus includes a direct-sound-generating unit for generating a direct sound from a sound signal supplied to the direct-sound-generating unit and a reflected-sound-generating unit for generating a sound serving as a substitute for a sound obtained as a result of reflection of the direct sound at a level lower than the direct sound with a timing lagging behind the direct sound from the sound signal supplied to the reflected-sound generating unit. The sound-field production apparatus makes it possible to reproduce an impressive sound field that gives a better feeling of presence on the scene as a sound field in a movie theater or the like does by creating a sound-field space having an effect of sound-image broadening.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: June 22, 2004
    Assignee: Sony Corporation
    Inventors: Takashi Kanai, Masataka Yoritate, Hiroshi Masuda
  • Patent number: 6744969
    Abstract: A data recording and reproducing apparatus has facilities for recording and reproducing, inputting and outputting, and editing data and can perform edits by itself. The data recording and reproducing apparatus records AV data inputted from an input port on HDDs by using a recorder and reproducer, and outputs data reproduced from HDDs by the recorder and reproducer through an output port. In an editor inputted is data inputted from outside and data reproduced by the recorder and reproducer. The editor performs edits on at least either of the data above by using a matrix switcher and an audio mixer provided therein. A special effector is utilized as necessary. The editor can output data obtained through editing processing to a switch.
    Type: Grant
    Filed: November 8, 1999
    Date of Patent: June 1, 2004
    Assignee: Sony Corporation
    Inventors: Kazuo Kamiyama, Makoto Tabuchi, Masakazu Murata, Shinichi Morishima, Yoshiharu Yamashita, Ichiro Fujisawa, Hiroshi Masuda, Tatsuo Tsukida, Yoshizo Mihara
  • Publication number: 20040092097
    Abstract: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.
    Type: Application
    Filed: May 23, 2003
    Publication date: May 13, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shinichi Domae, Hiroshi Masuda, Yoshiaki Kato, Kousaku Yano
  • Patent number: 6711270
    Abstract: The invention relates to an audio reproducing apparatus having a converting means for converting main audio signals included in an audio signal for a plurality of channels into audio signals that provide a reproduction sound field similar to that obtained in reproduction by means of speakers even when the audio signals are reproduced by means of headphones; and an adding means for adding an auxiliary audio signal included in the audio signal for a plurality of channels to an audio signal outputted from the converting means; wherein an audio signal outputted from the adding means is supplied to headphones.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: March 23, 2004
    Assignee: Sony Corporation
    Inventor: Hiroshi Masuda
  • Patent number: 6664136
    Abstract: A semiconductor device comprises: a semiconductor chip; a copper series lead frame with no residual of a rustproof film, including a die pad mounted with said semiconductor chip, and a plurality of leads disposed so that inner ends of said leads are positioned along the periphery of said die pad; copper wires to directly connect electrodes on said semiconductor chip to the inner ends of said plurality of leads; and a resin molded member to hermetically seal said semiconductor chip, a large proportion of said lead frame and said copper wires, wherein a water soluble rustproof agent is applied over outer lead segments, protruding from said resin molded member, of said plurality of leads.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: December 16, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Motonami, Hiroshi Masuda, Tadao Fukatani
  • Publication number: 20030128209
    Abstract: Umbilics of two surfaces are compared and it is determined from this comparison whether the suspect surface is a copy of the original surface based on the comparison. Comparing umbilics includes determining whether locations of the umbilics of the suspect surface match within a specified margin umbilics of the original surface, and determining whether pattern types of umbilics of the suspect surface match pattern types of corresponding umbilics of the original surface. A “weak” test may be performed, in which corresponding points on the two surfaces are compared, wherein the comparison of umbilics is performed if corresponding points of the two surfaces are located within a specified margin of each other. The points may be gridpoints on wireframes, which in turn may be based on lines of curvature of the surfaces. Comparing umbilics is performed if it is determined that each surface has at least one umbilic.
    Type: Application
    Filed: January 9, 2002
    Publication date: July 10, 2003
    Applicant: Massachusetts Institute of Technology
    Inventors: Takashi Maekawa, Nicholas M. Patrikalakis, Franz-Erich Wolter, Hiroshi Masuda