Patents by Inventor Hiroshi Mitsuyama

Hiroshi Mitsuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150092805
    Abstract: A semiconductor laser device includes a semiconductor laser element having an active layer and semiconductor layers on opposite sides of the active layer, and a PN-junction diode in part of the semiconductor layers. The PN-junction diode is connected, in inverse polarity, in parallel with the semiconductor laser element.
    Type: Application
    Filed: June 26, 2014
    Publication date: April 2, 2015
    Inventor: Hiroshi Mitsuyama
  • Patent number: 8680599
    Abstract: To provide a more reliable semiconductor device including a lower-cost and more reliable capacitor and a method of manufacturing the same. This manufacturing method comprises the steps of: preparing a semiconductor substrate; and forming, over one of the major surfaces of the semiconductor substrate, a first metal electrode including an aluminum layer, a dielectric layer over the first metal electrode, and a second metal electrode over the dielectric layer. In the step of forming the first metal electrode, the aluminum layer is formed so that the surface thereof satisfies a relationship of Rmax<80 nm, Rms<10 nm, and Ra<9 nm. The step of forming the first metal electrode comprises the steps of: forming at least one first barrier layer; forming the aluminum layer over the first barrier layer; and recrystallizing a crystal constituting the aluminum layer.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: March 25, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroshi Mitsuyama, Yasuhisa Fujii, Keiichi Yamada
  • Publication number: 20120049369
    Abstract: To provide a more reliable semiconductor device including a lower-cost and more reliable capacitor and a method of manufacturing the same. This manufacturing method comprises the steps of: preparing a semiconductor substrate; and forming, over one of the major surfaces of the semiconductor substrate, a first metal electrode including an aluminum layer, a dielectric layer over the first metal electrode, and a second metal electrode over the dielectric layer. In the step of forming the first metal electrode, the aluminum layer is formed so that the surface thereof satisfies a relationship of Rmax<80 nm, Rms<10 nm, and Ra<9 nm. The step of forming the first metal electrode comprises the steps of: forming at least one first barrier layer; forming the aluminum layer over the first barrier layer; and recrystallizing a crystal constituting the aluminum layer.
    Type: Application
    Filed: August 10, 2011
    Publication date: March 1, 2012
    Inventors: Hiroshi MITSUYAMA, Yasuhisa Fujii, Keiichi Yamada
  • Patent number: 7977700
    Abstract: A semiconductor package and a semiconductor light-emitting device including the semiconductor package. The semiconductor package includes: a frame for mounting a semiconductor light-emitting element; and a lead integral with the frame. The frame and the lead are made of a resin. A metal film is located in a predetermined area on the frame.
    Type: Grant
    Filed: January 2, 2009
    Date of Patent: July 12, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Mitsuyama, Kotaro Yajima, Naokazu Terai
  • Patent number: 7956473
    Abstract: Method of manufacturing semiconductor device including forming inter-layer insulating film on semiconductor substrate. First metal film is formed on inter-layer insulating film. First resist is formed on first metal film and patterned. Anisotropic etching performed on first metal film using first resist as mask. First resist is removed and second metal film is formed on inter-layer insulating film to cover remaining first metal film. Second resist is formed on second metal film in area where first metal film exists on inter-layer insulating film and part of area where first metal film does not exist. Anisotropic etching is performed on second metal film using second resist as mask and bonding pad having first metal film and second metal film, and upper layer wiring having second metal film and not first metal film. Second resist is removed. Surface protection film covering bonding pad is formed. Pad opening is formed on bonding pad.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Momono, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki
  • Publication number: 20090321777
    Abstract: A semiconductor package and a semiconductor light-emitting device including the semiconductor package. The semiconductor package includes: a frame for mounting a semiconductor light-emitting element; and a lead integral with the frame. The frame and the lead are made of a resin. A metal film is located in a predetermined area on the frame.
    Type: Application
    Filed: January 2, 2009
    Publication date: December 31, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi Mitsuyama, Kotaro Yajima, Naokazu Terai
  • Publication number: 20090026635
    Abstract: A method of manufacturing a semiconductor device comprises: a step of forming an inter-layer insulating film on a semiconductor substrate; a step of forming a first metal film on the inter-layer insulating film; a step of forming a first resist on the first metal film and patterning the first resist; a step of performing anisotropic etching on the first metal film using the first resist as a mask; a step of removing the first resist; a step of forming a second metal film on the inter-layer insulating film so as to cover the remaining first metal film; a step of forming a second resist on the second metal film in an area where the first metal film exists on the inter-layer insulating film and part of an area where the first metal film does not exist; a step of performing anisotropic etching on the second metal film using the second resist as a mask and forming a bonding pad having the first metal film and the second metal film and an upper layer wiring which has the second metal film, yet not the first metal f
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Inventors: Hiroyuki MOMONO, Hiroshi Mitsuyama, Katsuhiro Hasegawa, Keiko Nishitsuji, Kazunobu Miki