Patents by Inventor Hiroshi Morishima
Hiroshi Morishima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7571264Abstract: Provided is a computer system which includes computers and a storage system coupled to the computers. The storage system includes a first load measuring module that measures a first access load for each channel adaptor. At least one of the computers includes a path management module that manages paths through which the computers access logical units. The path management module includes a second load measuring module that measures a second access load imposed by access from the computer to the logical unit, and an active path setting module that selects one of the channel adaptors based on the first access and the second access load measured by the first and second load measuring modules, and setting an active path passing through the channel adaptor. Thus, a load on an entire system is balanced, thereby improving performance while a cache hit rate of a storage system is maintained.Type: GrantFiled: July 26, 2005Date of Patent: August 4, 2009Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.Inventors: Hirofumi Sahara, Hiroshi Morishima, Makoto Aoki, Osamu Kohama, Satoshi Kadoiri, Isao Nagase
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Patent number: 7519744Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: GrantFiled: December 3, 2007Date of Patent: April 14, 2009Assignee: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Patent number: 7376766Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: GrantFiled: October 4, 2006Date of Patent: May 20, 2008Assignee: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Publication number: 20080091849Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: ApplicationFiled: December 3, 2007Publication date: April 17, 2008Applicant: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Publication number: 20080065850Abstract: In the configuration of multiple (M units of) disk subsystems shared from multiple (N units of) hosts, having an exclusive control command that limits access to all disk subsystems temporarily is provided, using this exclusive control command, configuration information of all multiple disk subsystems, for example, performance and a setting change, are acquired in point of time series and stored in a management server database (“configuration information database”), then managed in a centralized manner, a function that associates the file that the application uses with the “configuration information database” is provided using a function that detects the position on the logical unit, and a means that can retrieve the modified contents of the system configuration and time as keys is provided in the “configuration information database”.Type: ApplicationFiled: October 25, 2007Publication date: March 13, 2008Inventors: Yasuaki Nakamura, Toshio Nakano, Akinobu Shimada, Tatsuya Murakami, Hiroshi Morishima
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Patent number: 7327265Abstract: An RF tag reader/writer is provided which includes a conveyance plate including a conveyance surface for conveying a paper containing an RF tag, and an antenna having a radiation element. The radiation element is positioned such that the RF tag provided in the paper conveyed on the conveyance surface passes over the radiation element, and a communication section transmits and receives radio waves to and from the RF tag through the antenna to execute data communication with the RF tag. A radio wave passage is provided in the conveyance plate at a position corresponding to the antenna such that the radio waves between the antenna and the RF rag pass through the radio wave passage.Type: GrantFiled: April 26, 2005Date of Patent: February 5, 2008Assignee: Toshiba Tec Kabushiki KaishaInventors: Hisashi Tsujimura, Nobuo Murofushi, Hiroshi Morishima, Seiichiro Yarita
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Patent number: 7305462Abstract: In the configuration of multiple (M units of) disk subsystems shared from multiple (N units of) hosts, having an exclusive control command that limits access to all disk subsystems temporarily is provided, using this exclusive control command, configuration information of all multiple disk subsystems, for example, performance and a setting change, are acquired in point of time series and stored in a management server database (“configuration information database”), then managed in a centralized manner, a function that associates the file that the application uses with the “configuration information database” is provided using a function that detects the position on the logical unit, and a means that can retrieve the modified contents of the system configuration and time as keys is provided in the “configuration information database”.Type: GrantFiled: February 20, 2002Date of Patent: December 4, 2007Assignee: Hitachi, Ltd.Inventors: Yasuaki Nakamura, Toshio Nakano, Akinobu Shimada, Tatsuya Murakami, Hiroshi Morishima
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Publication number: 20070028014Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: ApplicationFiled: October 4, 2006Publication date: February 1, 2007Applicant: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Patent number: 7130928Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: GrantFiled: July 29, 2004Date of Patent: October 31, 2006Assignee: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Publication number: 20060230189Abstract: Provided is a computer system which includes computers and a storage system coupled to the computers. The storage system includes a first load measuring module that measures a first access load for each channel adaptor. At least one of the computers includes a path management module that manages paths through which the computers access logical units. The path management module includes a second load measuring module that measures a second access load imposed by access from the computer to the logical unit, and an active path setting module that selects one of the channel adaptors based on the first access and the second access load measured by the first and second load measuring modules, and setting an active path passing through the channel adaptor. Thus, a load on an entire system is balanced, thereby improving performance while a cache hit rate of a storage system is maintained.Type: ApplicationFiled: July 26, 2005Publication date: October 12, 2006Inventors: Hirofumi Sahara, Hiroshi Morishima, Makoto Aoki, Osamu Kohama, Satoshi Kadoiri, Isao Nagase
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Patent number: 7120912Abstract: Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.Type: GrantFiled: October 29, 2004Date of Patent: October 10, 2006Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.Inventors: Satoshi Kadoiri, Hiroshi Morishima, Makoto Aoki, Isao Nagase, Osamu Kohama, Hirofumi Sahara
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Publication number: 20060026346Abstract: Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.Type: ApplicationFiled: October 29, 2004Publication date: February 2, 2006Inventors: Satoshi Kadoiri, Hiroshi Morishima, Makoto Aoki, Isao Nagase
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Publication number: 20050252968Abstract: An RF tag reader/writer is provided which includes a conveyance plate including a conveyance surface for conveying a paper containing an RF tag, and an antenna having a radiation element. The radiation element is positioned such that the RF tag provided in the paper conveyed on the conveyance surface passes over the radiation element, and a communication section transmits and receives radio waves to and from the RF tag through the antenna to execute data communication with the RF tag. A radio wave passage is provided in the conveyance plate at a position corresponding to the antenna such that the radio waves between the antenna and the RF rag pass through the radio wave passage.Type: ApplicationFiled: April 26, 2005Publication date: November 17, 2005Applicant: Toshiba Tec Kabushiki KaishaInventors: Hisashi Tsujimura, Nobuo Murofushi, Hiroshi Morishima, Seiichiro Yarita
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Publication number: 20050251548Abstract: A processing apparatus which stores a first information piece about attributes identifying a specific process generating data input/output requests in such a manner that the first information piece is associated with a second information piece identifying at least one of the physical paths as at least one first physical path, and which, when transmitting first data input/output requests generated by the process identified by the first information piece to the storage apparatus, transmits the first data input/output requests to the storage apparatus via the first physical path identified by the second information piece associated with the first information piece and, when transmitting second data input/output requests generated by a process not identified by the first information piece to the storage apparatus, transmits the second data input/output requests to the storage apparatus via at least one second physical path different from the first physical path of the plurality of physical paths.Type: ApplicationFiled: July 29, 2004Publication date: November 10, 2005Applicant: Hitachi, Ltd.Inventors: Takahiro Hayashi, Hiroshi Morishima, Osamu Kohama
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Patent number: 6950871Abstract: In order to construct an integrated storage system by reinforcing collaboration of components or functions of a storage system in which a storage area network (SAN) is used, in a computer system having multiple client computers, multiple various servers, multiple various storages which keep data, and a local area network (LAN) which connects the computers and the servers, a storage area network (SAN) which lies between the servers and storages forms a switched circuit network which is capable of connecting any server and any storage through fiber channel FC switches. The computer system further includes a terminal which is equipped with operation and management software which performs storage management including management of logical volumes in the various storages, data arrangement, error monitoring, management of setting up the FC switches, and backup for data in the storages.Type: GrantFiled: June 29, 2000Date of Patent: September 27, 2005Assignee: Hitachi, Ltd.Inventors: Shigeo Honma, Hiroshi Morishima, Tokuhiro Tsukiyama, Hiroyuki Matsushima, Takashi Oeda, Yoji Tomono
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Publication number: 20040073676Abstract: In order to construct an integrated storage system by reinforcing collaboration of components or functions of a storage system in which a storage area network (SAN) is used, in a computer system comprising multiple client computers, multiple various servers, multiple various storages which keep data, a local area network (LAN) which connects the computers and the servers, a storage area networks (SAN) which lies between the servers and said storages, the SAN forms a switched circuit network which is capable of connecting any servers and any storages through fiber channel switches, and the computer system further comprises a terminal which is equipped with operation and management software which performs storage management including management of logical volumes in the various storages, data arrangement, and error monitoring, management of setting up said FC switches, and backup operation for data in said storages.Type: ApplicationFiled: September 16, 2003Publication date: April 15, 2004Applicant: HITACHI, LTD.Inventors: Shigeo Honma, Hiroshi Morishima, Tokuhiro Tsukiyama, Hiroyuki Matsushima, Takashi Oeda, Yoji Tomono
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Publication number: 20040073677Abstract: In order to construct an integrated storage system by reinforcing collaboration of components or functions of a storage system in which a storage area network (SAN) is used, in a computer system comprising multiple client computers, multiple various servers, multiple various storages which keep data, a local area network (LAN) which connects the computers and the servers, a storage area networks (SAN) which lies between the servers and said storages, the SAN forms a switched circuit network which is capable of connecting any servers and any storages through fiber channel switches, and the computer system further comprises a terminal which is equipped with operation and management software which performs storage management including management of logical volumes in the various storages, data arrangement, and error monitoring, management of setting up said FC switches, and backup operation for data in said storages.Type: ApplicationFiled: September 17, 2003Publication date: April 15, 2004Applicant: HITACHI, LTD,Inventors: Shigeo Honma, Hiroshi Morishima, Tokuhiro Tsukiyama, Hiroyuki Matsushima, Takashi Oeda, Yoji Tomono
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Publication number: 20040073675Abstract: In order to construct an integrated storage system by reinforcing collaboration of components or functions of a storage system in which a storage area network (SAN) is used, in a computer system comprising multiple client computers, multiple various servers, multiple various storages which keep data, a local area network (LAN) which connects the computers and the servers, a storage area networks (SAN) which lies between the servers and said storages, the SAN forms a switched circuit network which is capable of connecting any servers and any storages through fiber channel switches, and the computer system further comprises a terminal which is equipped with operation and management software which performs storage management including management of logical volumes in the various storages, data arrangement, and error monitoring, management of setting up said FC switches, and backup operation for data in said storages.Type: ApplicationFiled: September 16, 2003Publication date: April 15, 2004Applicant: HITACHI, LTD.Inventors: Shigeo Honma, Hiroshi Morishima, Tokuhiro Tsukiyama, Hiroyuki Matsushima, Takashi Oeda, Yoji Tomono
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Publication number: 20030061331Abstract: In the configuration of multiple (M units of) disk subsystems shared from multiple (N units of) hosts, havingType: ApplicationFiled: February 20, 2002Publication date: March 27, 2003Inventors: Yasuaki Nakamura, Toshio Nakano, Akinobu Shimada, Tatsuya Murakami, Hiroshi Morishima
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Patent number: 5978839Abstract: Processor apparatuses share data, used in common for a plurality of systems, in a global memory in a share system. The global memory is divided into constant units and the individual division units are managed by using identifiers which are definitely determined as viewed from the processor apparatuses and the share system. When an inter-system exclusive state conditioning unit of a processor apparatus designates a desired area on an address space in the processor apparatus by using an identifier to obtain a locked resource, an update state confirming unit checks whether data in a corresponding unit in the share system is updated, and when the data is updated, a data transferring unit transfers the data in the corresponding unit in the share system to the address space. Accordingly, a program operating on each computer system can easily access the data shared by the systems without being aware of the presence of the share system.Type: GrantFiled: May 20, 1997Date of Patent: November 2, 1999Assignee: Hitachi, ltd.Inventors: Susumu Okuhara, Hiroshi Morishima, Shingo Maeda, Kikuko Morishima