Patents by Inventor Hiroshi NAKAKl

Hiroshi NAKAKl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170271350
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a first insulating film, a stacked body, and a first pillar. At least a portion of an upper layer portion of the substrate is conductive. The first insulating film is provided in a portion of the substrate. The stacked body includes conductive films and insulating films stacked alternately in a first direction. The conductive films and the insulating films are provided on the substrate and on the first insulating film. The first pillar pierces the stacked body in the first direction. The first pillar includes a first lower end portion and a first extension portion. The first lower end portion is disposed inside the first insulating film. The first extension portion is disposed inside the stacked body.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takashi MAEGAWA, Hiroshi NAKAKl
  • Publication number: 20170117288
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a first insulating film, a stacked body, and a first pillar. At least a portion of an upper layer portion of the substrate is conductive. The first insulating film is provided in a portion of the substrate. The stacked body includes conductive films and insulating films stacked alternately in a first direction. The conductive films and the insulating films are provided on the substrate and on the first insulating film. The first pillar pierces the stacked body in the first direction. The first pillar includes a first lower end portion and a first extension portion. The first lower end portion is disposed inside the first insulating film. The first extension portion is disposed inside the stacked body.
    Type: Application
    Filed: March 3, 2016
    Publication date: April 27, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takashi MAEGAWA, Hiroshi NAKAKl
  • Publication number: 20170069651
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate; a stacked body provided on the substrate and including a plurality of electrode layers; a semiconductor film; a charge storage film; an interconnect layer provided in the stacked body, the interconnect layer; a first contact portion; a first metal layer; and a second metal layer. The interconnect layer includes: a first portion including silicon; and a second portion provided on the first portion and including metal. The first metal layer is provided on the first contact portion. The second metal layer is provided on the first metal layer, and electrically connected to the interconnect layer.
    Type: Application
    Filed: December 21, 2015
    Publication date: March 9, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kei SAKAMOTO, Hiroshi NAKAKl