Patents by Inventor Hiroshi Nishimoto

Hiroshi Nishimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5074631
    Abstract: A Mach-Zehnder interferometer type modulator, constructed of first and second optical waveguides, first and second electrodes cooperating with the same, and a driving voltage source, wherein a driving voltage source is constructed of first and second driving units which drive independently the first and second electrodes in accordance with a data input and wherein the first and second driving units apply first and second driving voltages, individually determined, to the first and second electrodes.
    Type: Grant
    Filed: March 13, 1990
    Date of Patent: December 24, 1991
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Hamano, Izumi Amemiya, Hiroshi Nishimoto, Takefumi Namiki, Izumi Yokota, Tadashi Okiyama, Minoru Seino
  • Patent number: 5050947
    Abstract: An optical control device comprises optical waveguides provided on a substrate having an electrooptic effect, a buffer layer provided on the substrate to cover the optical waveguides, and control electrodes provided on the buffer layer for applying a predetermined voltage across the optical waveguides. The optical waveguides has a coupling portion, at which an interval of the optical waveguides is narrowed. In this optical control device, a distortion dispersing structure is provided in the vicinity of the control electrodes to disperse distortion locally accumulated in the vicinity of the control electrodes to the whole area of the substrate uniformly.
    Type: Grant
    Filed: July 20, 1990
    Date of Patent: September 24, 1991
    Assignee: NEC Corporation
    Inventors: Hisao Kawashima, Hiroshi Nishimoto
  • Patent number: 4989949
    Abstract: An arrangement for discriminating whether a semiconductor laser employed in a light transmission system is functional or non-functional includes a circuit for generating a pulse pattern repeatedly with a unit of a plurality of bits and outputting the pulse pattern to the semiconductor laser and a medium for passing a light pulse signal output from the semiconductor laser. Receiving equipment includes a circuit for regenerating the pulse pattern from the light pulse signal and outputting a regenerative pulse pattern, and a discriminating circuit responding to the regenerative pulse pattern.The discriminating circuit discriminates whether or not a pseudo-pulse exceeding a predetermined threshold level appears at a specific position in the regenerative pulse pattern during a predetermined time interval, and indicates a result of the discrimination.
    Type: Grant
    Filed: October 21, 1988
    Date of Patent: February 5, 1991
    Assignee: Fujitsu Limited
    Inventors: Hajime Imai, Hiroshi Nishimoto
  • Patent number: 4983006
    Abstract: A polarization-independent optical waveguide switch is provided featuring low loss and a small device element length by making the width of the optical waveguides in the light intake/outlet parts consisting of curved optical waveguides greater than the width of the optical waveguides of the optical coupling part.
    Type: Grant
    Filed: March 29, 1989
    Date of Patent: January 8, 1991
    Assignee: NEC Corporation
    Inventor: Hiroshi Nishimoto
  • Patent number: 4884278
    Abstract: Disclosed is a semiconductor laser modulation control system, and a method thereof. The system includes a drive circuit (1) for supplying a drive current to a semiconductor laser (2) in accordance with an input data, to modulate the input data into an optical signal of the semiconductor laser (2). The optical signal is either at a high intensity state or a low intensity state in accordance with an input data of "1" or "0", in respective time slots of the input data. The system further includes a duty ratio conversion circuit (3) for converting the duty ratio of the input data in such a way that the low intensity state of the optical signal is returned to the high intensity state within each time slot of the input data, whereby the relaxation oscillation is suppressed.
    Type: Grant
    Filed: March 6, 1989
    Date of Patent: November 28, 1989
    Assignee: Fujitsu Limited
    Inventors: Hiroshi Nishimoto, Takashi Touge, Tadashi Okiyama, Naoki Kuwata, Yasunari Arai
  • Patent number: 4875087
    Abstract: An integrated circuit device including: at least one semiconductor chip (3) having a plurality of circuit elements; a package (21 to 24) enclosing the semiconductor chip with a hermetic seal; and a strip line unit (15-2, 11-1b, 11-2, 20 and 23:15-1, 11-1, 11-2, 11-3, 12-1 and 20) for connecting the circuit elements in the semiconductor chip to circuit outside of the package. The stripline unit having a microstrip line structure and a triplate strip line structure serial-connected to the microstrip line structure and connecting the outside circuits. The triplate strip line structure has a characteristic impedance equal to that of the microstrip line structure so that the strip line unit satisfies the required impedance matching.
    Type: Grant
    Filed: July 22, 1988
    Date of Patent: October 17, 1989
    Assignee: Fujitsu Limited
    Inventors: Akira Miyauchi, Hiroshi Nishimoto, Tadashi Okiyama, Hiroo Kitasagami, Masahiro Sugimoto, Haruo Tamada, Shinji Emori
  • Patent number: 4827327
    Abstract: An integrated circuit device including a stacked layer unit having a plurality of stacked layers each having an insulation layer and at least one conductive layer strip formed on a surface of the insulation layer, and at least one chip mounted on the top of the insulation layer and having a plurality of circuit elements. The IC device also includes at least one first conductive member formed in the stacked layer unit, having a low inductance for first signals applied thereto and operatively connecting the first signals to be transferred between the circuit elements. The IC device further includes at least one second conductive member formed in the stacked layer unit, having a higher inductance for the first signals than that of the first conductive member and operatively connecting second signals to be transferred between the circuit elements the stacked layer unit, the chip, and the first and second conductive members are enclosed by a package and sealed with a hermetic seal.
    Type: Grant
    Filed: July 5, 1988
    Date of Patent: May 2, 1989
    Assignee: Fujitsu Limited
    Inventors: Akira Miyauchi, Hiroshi Nishimoto, Tadashi Okiyama, Hiroo Kitasagami, Masahiro Sugimoto, Haruo Tamada, Shinji Emori
  • Patent number: 4725878
    Abstract: A semiconductor device provided with signal lines which connect a chip, provided at a top portion of a package, with external terminals provided at a bottom portion of the package. The signal lines have portions formed along side surfaces of the package. Ground surfaces are formed at predetermined distances on two sides of the high-speed signal lines. A coplanar waveguide is formed by the high-speed signal lines and the ground surfaces, so the impedance of vertical portions of the high-speed signal lines is matched to the circuits connected thereto.
    Type: Grant
    Filed: March 27, 1986
    Date of Patent: February 16, 1988
    Assignee: Fujitsu Limited
    Inventors: Akira Miyauchi, Hiroshi Nishimoto, Tadashi Okiyama, Hiroo Kitasagami, Masahiro Sugimoto, Haruo Tamada, Shinji Emori
  • Patent number: 4495410
    Abstract: Circuitry for optimizing the signal-to-noise ratio of a light receiving circuit having an avalanche photo diode to receive the light and an amplifier connected thereto to provide an output signal, the level of the output signal being kept constant despite variations in the light input level by controlling the multiplication factor of the avalanche photo diode and the gain of the amplifier. For this purpose, when the light input level is low, the multiplication factor control voltage for the avalanche photo diode is controlled through a loop which includes a differential amplifier, a diode, and a high voltage generator circuit.
    Type: Grant
    Filed: February 5, 1982
    Date of Patent: January 22, 1985
    Assignee: Fujitsu Limited
    Inventors: Takatoshi Minami, Hiroshi Nishimoto