Abstract: A coding-decoding device and a coding-decoding method that take less time for coding and decoding are provided while using less number of logic gates. A memory device 15 substantially stores b pieces of conversion logic equations produced with a conversion logic equation producing device 13. An operation device 17 has a programmable hardware logic circuit to constitute logics sequentially according to plural execution unit logic equations obtained by dividing b pieces of conversion logic equations stored in the memory device 15 into execution units for respective execution unit logic equations using the hardware logic circuit. Besides, the operation device 17 sequentially divides and calculates the second sentences from the first sentences according to the constituted logics.

Abstract: A switch circuit that is simple in constitution and capable of reliably controlling a switch cell is provided. Since the gate terminal G1 of a transistor M1 in a switch cell SC is connected only to the terminal 37 of a transistor M2, when the transistor M2 is set to off, the moving path of the charge accumulated at the gate G1 of the transistor M1 is shut off. Consequently, even if the transistor M2 is set to an on state and immediately set back to an off state, the transistor M1 remains for some period of time in an on or off state corresponding to the switching data given through a bit line BL. It is possible to cause the transistor M1 to remain in an on or off state for a specified period of time without disposing a specific circuit for temporary storing the switching data.

Abstract: A resist material having a resist and particles mixed into the resist, a major component of the particles being a cluster of carbon atoms, is provided. A method for fabricating a resist material is also provided, the method repeatedly performing: a first step of coating a substrate with a resist film; and a second step of depositing particles whose major component is a cluster of carbon atoms on the resist film. Accordingly, a resist film with high etching resistance can be obtained, and it is possible to realize a reduction in the thickness of the resist film, improvements of contrast of resist patterns; resist sensitivity; heat resistance of resist films; mechanical strength of resist patterns; and further, stabilization of resist sensitivity. Therefore, highly precise fine pattern fabrication can be realized.

Abstract: A resist material having a resist and particles mixed into the resist, a major component of the particles being a cluster of carbon atoms, is provided. A method for fabricating a resist material is also provided, the method repeatedly performing: a first step of coating a substrate with a resist film; and a second step of depositing particles whose major component is a cluster of carbon atoms on the resist film. Accordingly, a resist film with high etching resistance can be obtained, and it is possible to realize a reduction in the thickness of the resist film, improvements of contrast of resist patterns; resist sensitivity; heat resistance of resist films; mechanical strength of resist patterns; and further, stabilization of resist sensitivity. Therefore, highly precise fine pattern fabrication can be realized.

Abstract: A propylene-based polymer composition obtained by polymerizing a propylene monomer in the presence of a stereoregular olefin polymerization catalyst system in the first stage to produce a crystalline propylene-based polymer(A) having an intrinsic viscosity of 5 dl/g or more, and successively polymerizing a propylene monomer in the second stage to produce a crystalline propylene-based polymer(B) with an intrinsic viscosity of less than 3 dl/g, wherein the content of the (A) is in the range of 0.05% by weight or more and less than 35% by weight in the total of the polymers(A) and (B), and the total of the polymers(A) and (B) has an intrinsic viscosity of less than 3 dl/g and a Mw/Mn of less than 10, and the foamed article thereof.

Abstract: It is an object of the present invention to provide a memory device with processing function using less transistors, and capable of operating with simple operation and allows its operation with less trouble. Each of W cells 34 includes a ferroelectric capacitor CF. One end 40 of the ferroelectric capacitor CF is connected to one of data lines D through a transistor T1. The one end 40 of the ferroelectric capacitor CF is connected to an inner data line MW through a transistor T2. The structure of the Q cells 36 is almost the same as that of the W cells 34. Both readout/writing operations of data from the outside of the device are performed by using the data line D. Data read out from both the W cell 34 and the Q cell 36 is sent to the adder 28 and added thereby, and the resultant data of the addition is written to the Q cell 36 through a buffer circuit 32. The memory device with processing function can be realized with a simple structure by using ferroelectric capacitors CF.

Abstract: In a solid state image sensing device comprising: a semiconductor substrate; a photosensitive pixel area disposed on the semiconductor substrate for generating signal charges in response to incident light and storing the signal charges; a charge transfer area disposed adjacent to the photosensitive pixel area for transferring the signal charges stored in the photosensitive pixel area; and a transfer electrode provided above the charge transfer area, the solid state image sensing device comprises: a high melting temperature metal layer composed of molybdenum silicide MoSi formed above the transfer electrode and an insulating layer having ample thickness formed between the high melting temperature metal layer and the transfer electrode. The light shielding efficiency can be improved and occurrence of a smear phenomenon can be prevented in the resulting device.

Abstract: In a solid state image sensing device comprising: a semiconductor substrate; a photosensitive pixel area disposed on the semiconductor substrate for generating signal charges in response to incident light and storing the signal charges; a charge transfer area disposed adjacent to the photosensitive pixel area for transferring the signal charges stored in the photosensitive pixel area; and a transfer electrode provided above the charge transfer area, the solid state image sensing device comprises: a high melting temperature metal layer composed of molybdenum silicide MoSi formed above the transfer electrode and an insulating layer having ample thickness formed between the high melting temperature metal layer and the transfer electrode. The light shielding efficiency can be improved and occurrence of a smear phenomenon can be prevented in the resulting device.

Abstract: A semiconductor device has a semiconductor substrate, a first insulating layer formed on the substrate, a conductive body formed on the first insulating layer, a second insulating layer formed on the first insulating layer and the conductive body and having a contact hole formed at a contact area to reach the conductive body, and a first conductive layer formed on the second insulating layer and the conductive body. The conductive body has a conductive member formed on the first insulating layer in the contact area, and a second conductive layer formed on the first insulating layer and the conductive member.

Abstract: A method of manufacturing a nonvolatile semiconductor memory device having a gate oxide layer including a relatively thin silicon dioxide layer. This gate oxide layer including the thin silicon dioxide layer is formed by the steps of forming the gate oxide film on a semiconductor element region in a silicon substrate; removing a portion of the gate oxide film to expose a portion of the silicon substrate; implanting impurity ions in the exposed portion of the substrate to an extent that a peak concentration of the impurity ions exceeds a solid solution limit at a temperature of the following thermal annealing step; activating the implanted impurity by thermal annealing so as to form a high impurity concentration layer and thermally oxidizing a surface of the high impurity concentration layer to form the thin silicon dioxide layer.

Abstract: A method for producing a semiconductor device comprises a step of forming a first gate insulation layer on a portion of a single crystal silicon substrate and forming a floating gate of polycrystalline silicon on the first gate insulation layer, a step of forming an oxide layer on the exposed portion of the substrate and on the floating gate, and a step of forming a control gate on the floating gate through the oxide layer. In the formation of the oxide layer, a nitride pattern layer is formed on the floating gate, the entire structure is oxidized by using the nitride pattern layer as a mask, thus forming a protective layer on the exposed portion of the substrate, the nitride pattern layer is removed, and the entire structure is again oxidized, thus forming a second gate insulation layer on the floating gate.

Abstract: There is disclosed a method of manufacturing a semiconductor device comprising a step of forming an isolation film having a patterned hole on a major surface of a semiconductor substrate of a P conductivity type, the wall of the isolation film defining the patterned hole having a large step, a step of forming a polysilicon layer on the major surface of the structure, a step of forming a first interlaid SiO.sub.2 layer on the polysilicon layer, a step of patterning the SiO.sub.2 layer and polysilicon layer using reactive ion etching process, thereby forming on the region of the substrate a gate electrode and a first SiO.sub.2 film superposed thereon, the continuous side wall of the gate electrode and first SiO.sub.2 film having a large step, a step of implanting an impurity ion into the substrate using the first SiO.sub.2 film as a mask, thereby forming an impurity diffused region of an N conductivity type in the substrate, a step of forming a second interlaid SiO.sub.

Abstract: A method of manufacturing semiconductor devices is disclosed. In the method, a redundancy circuit is formed by forming circuit elements making up an integrated circuit on a semiconductor substrate and a spare element connected to the circuit element through an electrically non-active region. Then, an impurity region is formed in the non-active region by introducing impurity and is electrically selectively activated with laser irradiation, whereby the circuit elements and the spare element are interconnected electrically.

Abstract: A method for element isolation utilizing insulating materials in a semiconductor substrate is proposed. In this method an oxidizable material layer of polycrystalline silicon or the like is formed and then the oxidizable material layer is selectively oxidized, using an oxidation-proof mask thereby forming a thick oxide layer. Thereafter, the oxidation-proof mask is removed and unoxidized oxidizable material below the mask is perpendicularly etched off, leaving part of the oxidizable material which is then oxidized to form together with the thick oxide layer an element isolation. This invention further proposes a semi-conductor device having element isolation layer whose bird's beak is very small in length.

Abstract: A method for element isolation utilizing insulating materials on a semiconductor substrate in which an oxidizable material layer of polycrystalline silicon or the like is formed overlying the substrate surface, the oxidizable material layer disposed at the element-isolation-forming regions is oxidized using an oxidation mask, the oxidation mask is removed and, if necesary at least part of the unoxidized oxidizable material below the mask is removed. Predetermined processes such as oxidation and diffusion are performed thereafter to form semiconductor elements such as MOS transistors and bipolar transistors with high packaging density and reliability.

Abstract: Dust is removed from a running web by a counterflow liquid bath and downstream application of one or more high velocity air jets to a localized convex curvature of the web, said application of high velocity air jets being accompanied by application of vacuum pressure to remove the mist created by the air jets.