Patents by Inventor Hiroshi Ohtsubo

Hiroshi Ohtsubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621757
    Abstract: In a cutting edge of a razor blade, a non-nitrided layer containing Ti, Al, and Cr formed on opposite surfaces of a base plate as a portion of a coating layer. A remaining layer containing Ti, Al, Cr, and N formed on opposite surfaces of the non-nitrided layer as a portion of a nitrided layer of the coating layer. A surface layer containing Ti, Al, Cr, and N formed on opposite surfaces of the remaining layer as a portion of the nitrided layer of the coating layer. A fluororesin layer formed on opposite surfaces of the surface layer with a bonding layer containing Cr and Al in between. The coating layer further improves the cutting edge, enhances cutting performance of the cutting edge, and maintains the enhanced cutting performance to improve the durability of the cutting edge.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: January 7, 2014
    Assignee: Kai R&D Center Co., Ltd.
    Inventors: Koichiro Akari, Hiroshi Ohtsubo
  • Patent number: 8614119
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8614505
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: December 24, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8564108
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: October 22, 2013
    Assignee: Fujtsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8522645
    Abstract: In a vacuum chamber, the edge of each blade group is subjected to an ion beam treatment under predetermined conditions using a plasma ion gun and argon as a medium, and is subjected to a plasma ion implantation of nitrogen plasma under predetermined conditions using a plasma ion implantation gun. As a result, it is possible to provide a blade member having an edge of a cutting quality enhanced by increasing the sharpness, a blade member having an edge of a rigidity enhanced by increasing the hardness, and a working apparatus capable of working those edges efficiently.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: September 3, 2013
    Assignees: Nagata Seiki Co., Ltd., Kai R&D Center Co., Ltd.
    Inventors: Kensuke Uemura, Hiroshi Ohtsubo
  • Publication number: 20120319264
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20120322209
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20120319275
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: August 28, 2012
    Publication date: December 20, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Patent number: 8278743
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Grant
    Filed: February 9, 2011
    Date of Patent: October 2, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20110316131
    Abstract: A BGA type semiconductor device includes: a substrate having wirings and electrodes; a semiconductor element disposed on the substrate, having a rectangular plan shape, and a plurality of electrodes disposed along each side of the semiconductor element; a plurality of wires connecting the electrodes on the semiconductor element with the electrodes on the substrate; a heat dissipation member disposed on the substrate, covering the semiconductor element, and having openings formed in areas facing apex portions of the plurality of wires connected to the electrodes formed along each side of the semiconductor element; and a sealing resin member for covering and sealing the semiconductor element and heat dissipation member.
    Type: Application
    Filed: February 9, 2011
    Publication date: December 29, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomoyuki Fukuda, Yoshihiro Kubota, Hiroshi Ohtsubo, Yuichi Asano
  • Publication number: 20100288097
    Abstract: In a vacuum chamber, the edge of each blade group is subjected to an ion beam treatment under predetermined conditions using a plasma ion gun and argon as a medium, and is subjected to a plasma ion implantation of nitrogen plasma under predetermined conditions using a plasma ion implantation gun. As a result, it is possible to provide a blade member having an edge of a cutting quality enhanced by increasing the sharpness, a blade member having an edge of a rigidity enhanced by increasing the hardness, and a working apparatus capable of working those edges efficiently.
    Type: Application
    Filed: December 24, 2008
    Publication date: November 18, 2010
    Applicants: NAGATA SEIKI CO., LTD., KAI R & D CENTER CO., LTD.
    Inventors: Kensuke UEMURA, Hiroshi OHTSUBO
  • Patent number: 7781259
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: August 24, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Publication number: 20100024222
    Abstract: In a cutting edge of a razor blade, a non-nitrided layer containing Ti, Al, and Cr is formed on opposite surfaces of a base plate as a portion of a coating layer. A remaining layer containing Ti, Al, Cr, and N is formed on opposite surfaces of the non-nitrided layer as a portion of a nitrided layer of the coating layer. A surface layer containing Ti, Al, Cr, and N is formed on opposite surfaces of the remaining layer as a portion of the nitrided layer of the coating layer. A fluororesin layer is formed on opposite surfaces of the surface layer with a bonding layer containing Cr and Al in between. The coating layer including the non-nitrided layer and the nitrided layer further improves the cutting edge, enhances cutting performance of the cutting edge, and maintains the enhanced cutting performance to improve the durability of the cutting edge.
    Type: Application
    Filed: March 27, 2008
    Publication date: February 4, 2010
    Inventors: Koichiro Akari, Hiroshi Ohtsubo
  • Publication number: 20070010046
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Application
    Filed: September 7, 2006
    Publication date: January 11, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Patent number: 7122402
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: October 17, 2006
    Assignee: Fujitsu Limited
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Patent number: 7060367
    Abstract: A blade with improved sharpness and durability is disclosed. The blade includes a base plate having an edge and a coating layer for coating the edge. The coating layer is formed of a material handling metal, and a tip of the coating layer is sharpened. It is preferred that an angle (Ba) between two tapered surfaces be between 15 to 45 degrees.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: June 13, 2006
    Assignee: Kai R&D Center Co., Ltd.
    Inventors: Katsuaki Yamada, Hiroshi Ohtsubo, Hiroyuki Tashita
  • Patent number: 6886262
    Abstract: A razor handle includes a hard section and a soft section integrally formed and overlapping each other. On the rear surface of a gripping section, a second rear contact section of the soft section is exposed and a finger applying concave section is formed at the upper section of the second rear contact section. On the front surface of the gripping section, the first front contact section of the hard section is exposed at the boundary section with a side surface, the second front contact section of the soft section is exposed between the first front contact sections at the both boundary sections, and a concave area is formed on the upper section of the second front contact section.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: May 3, 2005
    Assignee: Kai R&D Center Co., Ltd.
    Inventors: Hiroshi Ohtsubo, Kazuhiko Isogimi
  • Publication number: 20050070051
    Abstract: In a method of manufacturing a semiconductor device of the invention, a rigid substrate which supports one or more semiconductor elements on a surface of the substrate and is clamped between an upper mold and a lower mold of an encapsulation mold at a time of resin encapsulation is provided, so that a vent-end edge portion of the substrate corresponding to a vent end of the encapsulation mold has a thickness smaller than a thickness of other portions of the substrate. The substrate is disposed in the encapsulation mold, and resin is injected into a cavity between the upper mold and the substrate to encapsulate the semiconductor elements with the resin.
    Type: Application
    Filed: February 20, 2004
    Publication date: March 31, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Youhei Nagahama, Katsunori Wako, Yuichi Asano, Masanori Takahashi, Haruo Kojima, Masamichi Fujimoto, Hiroshi Ohtsubo, Yuki Yasuda
  • Publication number: 20040099120
    Abstract: A blade (1) with improved sharpness and durability is disclosed. The blade includes a base plate (3) having an edge and a coating layer (6) for coating the edge. The coating layer is formed of a material including metal, and a tip of the coating layer (2a) is sharpened. It is preferred that an angle (&bgr;a) between two tapered surfaces (7a, 8a) be between 15 to 45 degrees.
    Type: Application
    Filed: December 5, 2002
    Publication date: May 27, 2004
    Inventors: Katsuaki Yamada, Hiroshi Ohtsubo, Hiroyuki Tashita
  • Publication number: 20040093735
    Abstract: A razor handle includes a hard section and a soft section integrally formed and overlapping each other. On the rear surface of a gripping section, a second rear contact section of the soft section is exposed and a finger applying concave section is formed at the upper section of the second rear contact section. On the front surface of the gripping section, the first front contact section of the hard section is exposed at the boundary section with a side surface, the second front contact section of the soft section is exposed between the first front contact sections at the both boundary sections, and a concave area is formed on the upper section of the second front contact section.
    Type: Application
    Filed: November 14, 2003
    Publication date: May 20, 2004
    Inventors: Hiroshi Ohtsubo, Kazuhiko Isogimi