Patents by Inventor Hiroshi Omura

Hiroshi Omura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150363148
    Abstract: In an information processing apparatus, in a case where a printing instruction is output for generating print data via a printing dialog of an application in a first user interface environment and also a determination unit determines that a currently presented user interface environment is a second user interface environment, a display area where an instruction can be accepted is displayed in the second user interface environment, and when the display area is instructed, a printing-time input screen corresponding to the output instruction is displayed in the second user interface environment.
    Type: Application
    Filed: January 8, 2014
    Publication date: December 17, 2015
    Inventor: Hiroshi Omura
  • Publication number: 20150338124
    Abstract: An air flow direction adjusting device of an air-conditioning apparatus includes: a base member including attachment shafts; air flow direction adjusting members individually attached to the attachment shafts such that the air flow direction adjusting members are allowed to rotate; and a link plate configured to rotate the air flow direction adjusting members in an interlocked manner. At least one of the air flow direction adjusting members includes a rotation shaft attachment portion attached to the corresponding one of the attachment shafts, a link plate engagement portion to be engaged with the link plate, and an operation member attachment portion to which a manual operation member for manually adjusting orientation of the air flow direction adjusting members is attached. The manual operation member is not attached to at least one of the air flow direction adjusting members.
    Type: Application
    Filed: March 20, 2015
    Publication date: November 26, 2015
    Inventors: Den OZAKI, Kazuhito KOJIMA, Yasushi OBA, Hiroshi OMURA, Shota SUGAI, Takuya NIIMURA, Yosuke NAITO
  • Publication number: 20150300678
    Abstract: The air-conditioning apparatus includes a main body 1 including a frame body 2 and a base body 3 provided on a back surface side of the frame body 2, a frame body-side engagement section 2a and an extension section 2b that extends backward on both sides of the frame body-side engagement section 2a are provided on a back side of the frame body 2, a base body-side engagement section 3a that engages with the frame body-side engagement section 2a, and a support base 3b that is located below the extension section 2b are provided on a front side of the base body 3, and when the frame body 2 is mounted to the base body 3, the frame body-side engagement section 2a and the base body-side engagement section 3a engage with each other, and the extension section 2b is supported by the support base 3b.
    Type: Application
    Filed: February 27, 2015
    Publication date: October 22, 2015
    Inventors: Takuya NIIMURA, Kazuhito KOJIMA, Yasushi OBA, Hiroshi OMURA, Shota SUGAI, Den OZAKI, Yosuke NAITO
  • Publication number: 20150261480
    Abstract: To make a set of set values of a plurality of print setting items added in a first execution environment usable in a second execution environment as well, an information processing apparatus comprises: a first printer driver configured to operate in a first execution environment, and add a set of set values of a plurality of print setting items to a list; and an application corresponding to a second printer driver configured to operate in a second execution environment, and obtain the set of the set values added by the first printer driver and display the set of the set values as a choice.
    Type: Application
    Filed: February 9, 2015
    Publication date: September 17, 2015
    Inventor: Hiroshi Omura
  • Publication number: 20150242195
    Abstract: An information processing apparatus is configured to install a driver that has not yet been customized, in response to the start of installation of the driver, and modifies the installed driver such that a function setting value settable through the installed driver becomes identical to a function setting value of a customized driver.
    Type: Application
    Filed: July 26, 2013
    Publication date: August 27, 2015
    Inventor: Hiroshi Omura
  • Patent number: 9035392
    Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: May 19, 2015
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Nobuhiro Tsuda, Hidekatsu Nishimaki, Hiroshi Omura, Yuko Yoshifuku
  • Publication number: 20140239406
    Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
    Type: Application
    Filed: February 20, 2014
    Publication date: August 28, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Nobuhiro TSUDA, Hidekatsu NISHIMAKI, Hiroshi OMURA, Yuko YOSHIFUKU
  • Patent number: 8804161
    Abstract: Provided is an information processing device that processes data including a rendering resource, a first page rendering command including a link to the rendering resource, and a second page rendering command including a link to the rendering resource. The information processing device includes a first transmitting unit configured to transmit the rendering resource and the first page rendering command to an image forming device; a registering unit configured to register a copy of the rendering resource in a storage area other than the image forming device when the first transmitting unit transmits the rendering resource and the first page rendering command to the image forming device; and a second transmitting unit configured to transmit the second page rendering command to the image forming device by setting a link to the copy of the registered rendering resource to the second page rendering command.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: August 12, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Omura
  • Publication number: 20140198349
    Abstract: An image processing apparatus performs a density adjustment process for generating an image containing a copy-forgery-inhibited pattern image for warning against the use of copy products. To help users to easily adjust the density of a latent image portion and a background portion in the copy-forgery-inhibited pattern image, the image processing apparatus determines a density relationship of the latent image portion and the background portion by performing a plurality of adjustment operations, in combination, different in the amount of adjustment relating to the range of variable density in at least one of the latent image portion and the background portion, and sets, based on the density relationship, the density data of each of the latent image portion and the background portion in the data of the copy-forgery-inhibited pattern image.
    Type: Application
    Filed: January 21, 2014
    Publication date: July 17, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Masanori Aritomi, Yasuhiro Kujirai, Hiroshi Omura, Tatsuro Uchida, Yoshihiro Takagi
  • Patent number: 8710552
    Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: April 29, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Nobuhiro Tsuda, Hidekatsu Nishimaki, Hiroshi Omura, Yuko Yoshifuku
  • Publication number: 20130258389
    Abstract: Provided is an information processing device that processes data including a rendering resource, a first page rendering command including a link to the rendering resource, and a second page rendering command including a link to the rendering resource. The information processing device includes a first transmitting unit configured to transmit the rendering resource and the first page rendering command to an image forming device; a registering unit configured to register a copy of the rendering resource in a storage area other than the image forming device when the first transmitting unit transmits the rendering resource and the first page rendering command to the image forming device; and a second transmitting unit configured to transmit the second page rendering command to the image forming device by setting a link to the copy of the registered rendering resource to the second page rendering command.
    Type: Application
    Filed: March 12, 2013
    Publication date: October 3, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Hiroshi Omura
  • Patent number: 8344427
    Abstract: The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell includes a diffusion region, a functional device region opposed to the diffusion region, and a metal layer. The second standard cell includes another diffusion region continuous with the diffusion region, another functional device region opposed to the other diffusion region, and further another diffusion region formed between the other diffusion region and the other functional device region. The metal layer and the other functional device region are coupled together electrically through the diffusion regions.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: January 1, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Omura
  • Publication number: 20120292714
    Abstract: The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell includes a diffusion region, a functional device region opposed to the diffusion region, and a metal layer. The second standard cell includes another diffusion region continuous with the diffusion region, another functional device region opposed to the other diffusion region, and further another diffusion region formed between the other diffusion region and the other functional device region. The metal layer and the other functional device region are coupled together electrically through the diffusion regions.
    Type: Application
    Filed: July 31, 2012
    Publication date: November 22, 2012
    Inventor: Hiroshi OMURA
  • Publication number: 20120261723
    Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
    Type: Application
    Filed: June 29, 2012
    Publication date: October 18, 2012
    Applicant: Renesas Electronics Corporation
    Inventors: Nobuhiro TSUDA, Hidekatsu NISHlMAKI, Hiroshi OMURA, Yuko YOSHIFUKU
  • Patent number: 8285349
    Abstract: It is aimed to attain compatibility between a size reduction, a thickness reduction of a portable terminal and the ensuring of an energizing force is attained. An upper case 2 is coupled with a connecting portion 4 to proceed in a predetermined direction with respect to a lower case 3. Two cases 2, 3 have a close state in which they are overlapped mutually and an open state in which the upper case 2 is extended by moving in a predetermined direction. One end of a coil portion 33A is fixed to a second hole 46 and the other end of the coil portion 33A is fixed to a third hole 50, and the connecting portion 4 has a torsion coil spring 33 that applies an energizing force to two cases 2, 3 such that the cases 2, 3 are brought into the close state or the open state.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: October 9, 2012
    Assignee: Panasonic Corporation
    Inventors: Noriyoshi Sato, Kazuhiro Konishi, Kazunori Kono, Hiroshi Omura
  • Patent number: 8258553
    Abstract: The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell includes a diffusion region, a functional device region opposed to the diffusion region, and a metal layer. The second standard cell includes another diffusion region continuous with the diffusion region, another functional device region opposed to the other diffusion region, and further another diffusion region formed between the other diffusion region and the other functional device region. The metal layer and the other functional device region are coupled together electrically through the diffusion regions.
    Type: Grant
    Filed: May 5, 2011
    Date of Patent: September 4, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Omura
  • Patent number: 8237203
    Abstract: A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: August 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Nobuhiro Tsuda, Hidekatsu Nishimaki, Hiroshi Omura, Yuko Yoshifuku
  • Patent number: 8163534
    Abstract: A microorganism capable of degrading an estrogenic substance contained in wastewater and the like; a method for the simple and effective degradation of an estrogenic substance contained in domestic wastewater, wastewater discharged from a livestock farm, or the like by using the microorganism; and an apparatus for achieving the degradation are provided. An estrogenic substance-degrading microorganism which belongs to the genus Pseudaminobacter, Gordonia, Nocardia, Zoogloea, Pandoraea, Cryptococcus or Trichosporon and has an ability to degrade an estrogenic substance; a method for the degration of an estrogenic substance by using the microorganism; and an apparatus for achieving the degradation are provided.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: April 24, 2012
    Assignees: Kabushiki Kaisha Yakult Honsha, Japan as represented by Director-General of the Ministry of Land, Infrastructure and Transport, National Institute for Land and Infrastructure Management
    Inventors: Takeshi Yoshimoto, Fumiko Nagai, Junji Fujimoto, Kazumasa Kimura, Harumi Mizukoshi, Koichi Watanabe, Takashi Makino, Hiroshi Omura, Hideyuki Saino
  • Publication number: 20110272776
    Abstract: The chip area of a semiconductor device having a plurality of standard cells is to be made smaller. A semiconductor device includes first and second standard cells. The first standard cell includes a diffusion region, a functional device region opposed to the diffusion region, and a metal layer. The second standard cell includes another diffusion region continuous with the diffusion region, another functional device region opposed to the other diffusion region, and further another diffusion region formed between the other diffusion region and the other functional device region. The metal layer and the other functional device region are coupled together electrically through the diffusion regions.
    Type: Application
    Filed: May 5, 2011
    Publication date: November 10, 2011
    Inventor: Hiroshi OMURA
  • Patent number: 7764394
    Abstract: A printing result can be obtained with correct segment of a set unit in a collate document. When a printing mode in which a spool file manager 304 outputs a plurality of logical pages on one storage medium, drawing information among logical pages in a document is compared, and, when it is determined that the document is a collate document to be printed in plural set units, drawing information among logical pages in a document spooled in a spool file 303 is compared. Then, the number of pages indicating a segment of a set unit is detected, and a set-unit transfer process for drawing information on a printer 1500 is controlled depending on the segment of a set unit.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: July 27, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Omura