Patents by Inventor Hiroshi Onodera

Hiroshi Onodera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8596797
    Abstract: In one embodiment, a light source device comprises a container with a duct unit disposed above an arc tube and extends along the center axis of light reflected by a reflection surface such that cooling air can flow in a direction opposite to the traveling direction of light reflected by the reflection surface. The duct unit includes a first opening disposed at a position shifted toward the traveling direction side from an opening end of the first reflection mirror, a wall portion which forms the edge of the first opening on the side opposite to the traveling direction side as a final end of the duct unit, and an inclined portion disposed in the vicinity of the edge of the first opening on the traveling direction side to bend the flowing direction of the cooling air toward an upper surface opposite to the surface having the first opening.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: December 3, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Hiroshi Onodera, Takahiro Takizawa
  • Publication number: 20130193125
    Abstract: A laser processing machine includes a work head, a plate-like work working table for processing a plate-like work, a rod-like work working table including a rod-like work holder for processing a rod-like work, and a work area in which the work head is movably provided. The plate-like work working table is provided movably from one side of the work area into the work area. The rod-like work working table is provided movably from another side of the work area into the work area that is opposite side of the one side. According to the laser processing machine, when switching over between a processing of a plate-like work and a processing of a rod-like work, it is needed only to move/evacuate the plate-like work working table and the rod-like work working table to/from the work area, so that the switching-over operation can be easily done.
    Type: Application
    Filed: October 21, 2011
    Publication date: August 1, 2013
    Applicant: AMADA COMPANY, LIMITED
    Inventors: Harumi Nishiyama, Hiroshi Onodera, Masaki Adachi, Toshinori Abe
  • Patent number: 8408714
    Abstract: A light source device includes: an arc tube having a light emission portion; a first reflection mirror having a substantially concave surface for reflecting light emitted from the light emission portion; and a container which accommodates the arc tube and the first reflection mirror, wherein the container has a duct unit disposed above the arc tube. The duct unit includes a first opening open to the arc tube and disposed at a position shifted toward the traveling direction side from an opening end of the first reflection mirror, a wall portion which forms the edge of the first opening on the side opposite to the traveling direction side as a final end of the duct unit, and an inclined portion disposed in the vicinity of the edge of the first opening on the traveling direction side to bend the flowing direction of the cooling air toward the surface opposite to the surface having the first opening.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: April 2, 2013
    Assignee: Seiko Epson Corporation
    Inventors: Hiroshi Onodera, Takahiro Takizawa
  • Publication number: 20110234345
    Abstract: According to one aspect of the present invention, a combined magnetic body includes a plurality of nanowires composed of a magnetic material. In the combined magnetic body, the nanowires are combined together to be formed into a tubular structure or a basket-shaped structure.
    Type: Application
    Filed: November 28, 2008
    Publication date: September 29, 2011
    Inventors: Hiroshi Onodera, Atsushi Nakahira
  • Publication number: 20110234987
    Abstract: A light source device includes: an arc tube having a light emission portion containing a pair of electrodes and configured to emit light by discharges induced between the pair of the electrodes; and a container body that accommodates the arc tube, the container body has a space in which the arc tube is accommodated, and a plurality of openings through that cooling fluids introduced from the outside of the container body are supplied into the space, the plural openings are formed at positions that allow the cooling fluids passing through the openings to collide with each other at a collision position above the light emission portion.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 29, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Kazuhiro TANAKA, Hiroshi YAMANOI, Michiko YAMASAKI, Hiroshi ONODERA, Yuichiro IWAMA, Toshizo NISHI
  • Patent number: 7967449
    Abstract: An arc tube includes: a tube spherical portion containing a pair of electrodes each of which has a shaft portion and a coil winding portion formed by winding coil around the shaft portion; and a pair of seal portions extending from both sides of the tube spherical portion. The coil winding portion of at least one of the electrodes has a coil portion formed by winding the coil at least once around the shaft portion in the longitudinal direction of the shaft portion, a tip disposed on the tip side of the coil portion, and a base disposed on the base side of the coil portion. The coil of the base positioned on the surface side of the electrode is melt-treated. The coil forming the base is not melted to be combined with the shaft portion.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: June 28, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Hiroshi Onodera
  • Publication number: 20110038777
    Abstract: The present invention relates to a production method, of water glass, comprising dissolving a sodium-based byproduct which is by-produced in the process of enhancing the purity of silicone and not only contains silicon but also contains sodium silicate as a main component, in water to produce crude water glass, at the same time, dissolving the silicon to generate a hydrogen gas, and then filtering the crude water glass to produce water glass. An object of the present invention is to provide a production method of water glass, ensuring that in utilizing, as water glass, a sodium-based byproduct which is by-produced in the process of enhancing the purity of silicon and not only contains silicon but also contains sodium silicate as a main component, the problem of hydrogen gas generation attributable to silicon contained in the byproduct can be solved, a safe and stable operation is possible, and effective utilization as transparent water glass can be achieved.
    Type: Application
    Filed: April 3, 2009
    Publication date: February 17, 2011
    Inventors: Jiro Kondo, Nobuyuki Ono, Hiroshi Onodera, Tsutomu Saito
  • Publication number: 20100103382
    Abstract: A light source device includes: an arc tube having a light emission portion; a first reflection mirror having a substantially concave surface for reflecting light emitted from the light emission portion; and a container which accommodates the arc tube and the first reflection mirror, wherein the container has a duct unit disposed above the arc tube. The duct unit includes a first opening open to the arc tube and disposed at a position shifted toward the traveling direction side from an opening end of the first reflection mirror, a wall portion which forms the edge of the first opening on the side opposite to the traveling direction side as a final end of the duct unit, and an inclined portion disposed in the vicinity of the edge of the first opening on the traveling direction side to bend the flowing direction of the cooling air toward the surface opposite to the surface having the first opening.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 29, 2010
    Applicant: Seiko Epson Corporation
    Inventors: Hiroshi Onodera, Takahiro Takizawa
  • Publication number: 20080203918
    Abstract: An arc tube includes: a tube spherical portion containing a pair of electrodes each of which has a shaft portion and a coil winding portion formed by winding coil around the shaft portion; and a pair of seal portions extending from both sides of the tube spherical portion. The coil winding portion of at least one of the electrodes has a coil portion formed by winding the coil at least once around the shaft portion in the longitudinal direction of the shaft portion, a tip disposed on the tip side of the coil portion, and a base disposed on the base side of the coil portion. The coil of the base positioned on the surface side of the electrode is melt-treated. The coil forming the base is not melted to be combined with the shaft portion.
    Type: Application
    Filed: February 19, 2008
    Publication date: August 28, 2008
    Applicant: Seiko Epson Corporation
    Inventor: Hiroshi Onodera
  • Patent number: 6960827
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: November 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Publication number: 20040188855
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Application
    Filed: April 6, 2004
    Publication date: September 30, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Patent number: 6781241
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Grant
    Filed: October 17, 2002
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Publication number: 20030197260
    Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.
    Type: Application
    Filed: October 17, 2002
    Publication date: October 23, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
  • Patent number: 6621169
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: September 16, 2003
    Assignee: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
  • Patent number: 6528348
    Abstract: A plurality of semiconductor devices can be mounted on a mounting board in a three-dimensional structure by stacking one on another with a simple structure. A semiconductor element is mounted on a first surface of an interposer. Electrode pads connected to the semiconductor element are arranged around the semiconductor element on the first surface of the interposer. Protruding electrodes are provided on the respective electrode pads. Through holes are formed in the interposer so as to extend from a second surface opposite to the first surface of the redistribution substrate to the respective electrode pads. The semiconductor element is encapsulated by a seal resin. Each of the protruding electrodes is higher than the sealed portion of the semiconductor element.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: March 4, 2003
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Ando, Akira Takashima, Hiroshi Onodera, Eiji Yoshida, Kazuo Teshirogi
  • Publication number: 20020074630
    Abstract: A plurality of semiconductor devices can be mounted on a mounting board in a three-dimensional structure by stacking one on another with a simple structure. A semiconductor element is mounted on a first surface of an interposer. Electrode pads connected to the semiconductor element are arranged around the semiconductor element on the first surface of the interposer. Protruding electrodes are provided on the respective electrode pads. Through holes are formed in the interposer so as to extend from a second surface opposite to the first surface of the redistribution substrate to the respective electrode pads. The semiconductor element is encapsulated by a seal resin. Each of the protruding electrodes is higher than the sealed portion of the semiconductor element.
    Type: Application
    Filed: February 19, 2002
    Publication date: June 20, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Fumihiko Ando, Akira Takashima, Hiroshi Onodera, Eiji Yoshida, Kazuo Teshirogi
  • Patent number: 6388333
    Abstract: A plurality of semiconductor devices can be mounted on a mounting board in a three-dimensional structure by stacking one on another with a simple structure. A semiconductor element is mounted on a first surface of an interposer. Electrode pads connected to the semiconductor element are arranged around the semiconductor element on the first surface of the interposer. Protruding electrodes are provided on the respective electrode pads. Through holes are formed in the interposer so as to extend from a second surface opposite to the first surface of the redistribution substrate to the respective electrode pads. The semiconductor element is encapsulated by a seal resin. Each of the protruding electrodes is higher than the sealed portion of the semiconductor element.
    Type: Grant
    Filed: June 27, 2000
    Date of Patent: May 14, 2002
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Taniguchi, Kouhei Orikawa, Tadashi Uno, Fumihiko Ando, Akira Takashima, Hiroshi Onodera, Eiji Yoshida, Kazuo Teshirogi
  • Publication number: 20020027295
    Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 7, 2002
    Applicant: Fujitsu Limited
    Inventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
  • Patent number: 6042865
    Abstract: The present invention relates to a food foaming agent composition which imparts good taste and good texture in the mouth to the food product and imparts good foaming property and good foaming stability. This food foaming agent composition is characterized in that (1) the taste of the product is not deteriorated regardless of excellent foaming property and excellent foaming stability because it contains a glycerin fatty acid ester as an emulsifier but does not contain a sorbitan fatty acid ester, a propylene glycol fatty acid ester and a sucrose fatty acid ester. More specifically, the food foaming agent composition is characterized in that (2) a glycerin saturated fatty acid monoester and a polyglycerin saturated fatty acid ester are used as the glycerin fatty acid ester in a weight ratio within the range from 1:0.
    Type: Grant
    Filed: June 17, 1997
    Date of Patent: March 28, 2000
    Assignee: Riken Vitamin Co., Ltd.
    Inventors: Hiroshi Onodera, Kumi Horikawa, Noriko Ikawa
  • Patent number: 4908681
    Abstract: An insulated gate field effect transistor fabricated in one conductivity type semiconductor substrate wherein a source region and a drain region are formed apart each other to define a channel region therebetween, having a deep ion implantation region which is so formed in the lower portion of the channel region that at least one end portion of the depletion region of the channel extends towards the source region beyond the border between the source region and the channel region at the surface of the substrate whereby an imaginary straight line drawn from said border at the surface of the substrate and an intersecting point between the depletion region of the source and the depletion region of the channel region without a back gate bias voltage defines an angle larger than 90.degree. against the surface of the substrate.
    Type: Grant
    Filed: October 27, 1988
    Date of Patent: March 13, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Masanori Nishida, Masashige Aoyama, Hiroshi Onodera