Patents by Inventor Hiroshi Oshino
Hiroshi Oshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10566420Abstract: A semiconductor device of an embodiment includes an overvoltage protection diode in which an N-type semiconductor layer and a P-type semiconductor layer, formed on an insulating film in a voltage supporting region, are alternately disposed adjacently to each other. The overvoltage protection diode is disposed at a corner portion on the upper face of the insulating film, and extends from the corner portion to the center portion of the semiconductor substrate.Type: GrantFiled: September 30, 2016Date of Patent: February 18, 2020Assignee: Shindengen Electric Manufacturing Co., Ltd.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Patent number: 10424578Abstract: A semiconductor device of an embodiment includes a conductive semiconductor substrate, an insulating film formed on the semiconductor substrate, an overvoltage protection diode configured to be formed on the insulating film and to include an n-type semiconductor layer and a p-type semiconductor layer alternately arranged adjacent to each other, and an insulating film that covers the overvoltage protection diode. The concentration of the p-type impurities in the p-type semiconductor layer is lower than the concentration of the n-type impurities in the n-type semiconductor layer. The concentration peak of the p-type impurities is disposed in a non-boundary region between a boundary region and a boundary region.Type: GrantFiled: September 13, 2016Date of Patent: September 24, 2019Assignee: Shindengen Electric Manufacturing Co., Ltd.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Patent number: 10366976Abstract: A semiconductor switch SW that includes a collector electrode C, an emitter electrode E and a gate electrode G, a Zener diode 5A configured to include one end electrically connected to the collector electrode C, the other end electrically connected to the gate electrode G, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, a Zener diode 5B configured to include one end electrically connected to the gate electrode G, the other end electrically connected to the emitter electrode E, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, are provided. The Zener diode 5A and the Zener diode 5B are configured so as not to allow the voltage of the gate electrode G to be increased to an on-threshold voltage of the semiconductor switch SW in the reverse bias application state.Type: GrantFiled: December 22, 2016Date of Patent: July 30, 2019Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Patent number: 10361184Abstract: A semiconductor device according to an embodiment includes: an insulating film formed on a voltage supporting region B; an overvoltage protection diode that includes an n-type semiconductor layer and a p-type semiconductor layer; conductor portions that are formed on the insulating film and are electrically connected to the overvoltage protection diode; and a high-potential portion arranged above the overvoltage protection diode via an insulating film. The p-type impurity concentration of the p-type semiconductor layer is lower than the n-type impurity concentration of the n-type semiconductor layer. In the reverse bias application state, the high-potential portion has a higher potential than a potential of the potential of the p-type semiconductor layer disposed directly under the high-potential portion.Type: GrantFiled: September 30, 2016Date of Patent: July 23, 2019Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Publication number: 20190148354Abstract: A semiconductor switch SW that includes a collector electrode C, an emitter electrode E and a gate electrode G, a Zener diode 5A configured to include one end electrically connected to the collector electrode C, the other end electrically connected to the gate electrode G, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, a Zener diode 5B configured to include one end electrically connected to the gate electrode G, the other end electrically connected to the emitter electrode E, and n-type semiconductor layers and p-type semiconductor layers alternately arranged adjacent to each other, are provided. The Zener diode 5A and the Zener diode 5B are configured so as not to allow the voltage of the gate electrode G to be increased to an on-threshold voltage of the semiconductor switch SW in the reverse bias application state.Type: ApplicationFiled: December 22, 2016Publication date: May 16, 2019Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei KOTANI, Toshiki MATSUBARA, Nobutaka ISHIZUKA, Masato MIKAWA, Hiroshi OSHINO
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Patent number: 10199483Abstract: In a semiconductor device according to an embodiment, ends of conductor portions are electrically connected to an overvoltage protection diode so that depletion occurs in a diffusion layer in a portion near an insulating film in a reverse bias application state, and/or ends of conductor portions are electrically connected to the overvoltage protection diode so that depletion occurs in a peripheral semiconductor region in a portion near the insulating film in the reverse bias application state.Type: GrantFiled: May 26, 2016Date of Patent: February 5, 2019Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Publication number: 20180331178Abstract: A semiconductor device of an embodiment includes an overvoltage protection diode in which an N-type semiconductor layer and a P-type semiconductor layer, formed on an insulating film in a voltage supporting region, are alternately disposed adjacently to each other. The overvoltage protection diode is disposed at a corner portion on the upper face of the insulating film, and extends from the corner portion to the center portion of the semiconductor substrate.Type: ApplicationFiled: September 30, 2016Publication date: November 15, 2018Applicant: Shindengen Electric Manufacturing Co., Ltd.Inventors: Ryohei KOTANI, Toshiki MATSUBARA, Nobutaka ISHIZUKA, Masato MIKAWA, Hiroshi OSHINO
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Publication number: 20180331092Abstract: A semiconductor device according to an embodiment includes: an insulating film formed on a voltage supporting region B; an overvoltage protection diode that includes an n-type semiconductor layer and a p-type semiconductor layer; conductor portions that are formed on the insulating film and are electrically connected to the overvoltage protection diode; and a high-potential portion arranged above the overvoltage protection diode via an insulating film. The p-type impurity concentration of the p-type semiconductor layer is lower than the n-type impurity concentration of the n-type semiconductor layer. In the reverse bias application state, the high-potential portion has a higher potential than a potential of the potential of the p-type semiconductor layer disposed directly under the high-potential portion.Type: ApplicationFiled: September 30, 2016Publication date: November 15, 2018Applicant: Shindengen Electric Manufecturing Co., Ltd.Inventors: Ryohei KOTANI, Toshiki MATSUBARA, Nobutaka ISHIZUKA, Masato MIKAWA, Hiroshi OSHINO
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Publication number: 20180294257Abstract: A semiconductor device of an embodiment includes a conductive semiconductor substrate, an insulating film formed on the semiconductor substrate, an overvoltage protection diode configured to be formed on the insulating film and to include an n-type semiconductor layer and a p-type semiconductor layer alternately arranged adjacent to each other, and an insulating film that covers the overvoltage protection diode. The concentration of the p-type impurities in the p-type semiconductor layer is lower than the concentration of the n-type impurities in the n-type semiconductor layer. The concentration peak of the p-type impurities is disposed in a non-boundary region between a boundary region and a boundary region.Type: ApplicationFiled: September 13, 2016Publication date: October 11, 2018Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei Kotani, Toshiki Matsubara, Nobutaka Ishizuka, Masato Mikawa, Hiroshi Oshino
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Publication number: 20180204935Abstract: In a semiconductor device according to an embodiment, ends of conductor portions are electrically connected to an overvoltage protection diode so that depletion occurs in a diffusion layer in a portion near an insulating film in a reverse bias application state, and/or ends of conductor portions are electrically connected to the overvoltage protection diode so that depletion occurs in a peripheral semiconductor region in a portion near the insulating film in the reverse bias application state.Type: ApplicationFiled: May 26, 2016Publication date: July 19, 2018Applicant: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.Inventors: Ryohei KOTANI, Toshiki MATSUBARA, Nobutaka ISHIZUKA, Masato MIKAWA, Hiroshi OSHINO
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Patent number: 8296237Abstract: An information service system works to record or print out, at a fee, information contents downloaded from Web servers, information received from facsimiles and information carried on portable storage mediums. The system includes a recording part which records, duplicates and prints out the image of digitized information, an information accumulating part which accumulates information by making relation with users, a user authenticating part which receives user authentication information and authenticates the legitimacy of the user, a fee calculating part which calculates the fee for information recording, a payment reception part which receives the payment of fee by the user, and a management part which manages the charging data and payment data. The recording part records the supplied information only after authentication of user legitimacy and payment of fee by the user.Type: GrantFiled: December 31, 2007Date of Patent: October 23, 2012Assignee: Fuji Xerox Co., Ltd.Inventors: Toshiki Okiyama, Akira Akiyama, Tadamitsu Miyawaki, Hiroshi Oshino, Shinji Akahira, Hiroaki Anraku
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Publication number: 20080123857Abstract: An information service system works to record or print out, at a fee, information contents downloaded from Web servers, information received from facsimiles and information carried on portable storage mediums. The system includes a recording part which records, duplicates and prints out the image of digitized information, an information accumulating part which accumulates information by making relation with users, a user authenticating part which receives user authentication information and authenticates the legitimacy of the user, a fee calculating part which calculates the fee for information recording, a payment reception part which receives the payment of fee by the user, and a management part which manages the charging data and payment data. The recording part records the supplied information only after authentication of user legitimacy and payment of fee by the user.Type: ApplicationFiled: December 31, 2007Publication date: May 29, 2008Applicant: FUJI XEROX CO., LTD.Inventors: Toshiki Okiyama, Akira Akiyama, Tadamitsu Miyawaki, Hiroshi Oshino, Shinji Akahira, Hiroaki Anraku
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Patent number: 5221140Abstract: A sub-miniature lamp in which a lamp body having a filament and an envelope is covered with a soft silicone rubber cap of a predetermined color having an opening at one end to a predetermined length of lead wires extending from the lamp body. A closure member is fitted to the opening of the envelope to seal the opening. The colored silicone rubber cap covers the envelope of the lamp body and is extended to a predetermined length of the lead wires, with the opened end of the cap fitted with an adhesive agent or a disc pad.Type: GrantFiled: March 9, 1992Date of Patent: June 22, 1993Assignee: Oshino Electric Lamp Works, Ltd.Inventor: Hiroshi Oshino