Abstract: An object of the present disclosure is to make it possible to allow an operator or the like to grasp a carbon potential value of an atmosphere in a heat treatment furnace more simply. A heat treatment furnace (10) according to one aspect of the present disclosure includes a carbon potential value deriving section configured to derive a carbon potential value of an atmosphere in a heat treatment chamber on a basis of output of a gas sensor, and output of a temperature sensor, and a first display section configured to display the derived carbon potential value (P1) on a graph D that is displayed in a first display area (41A), and has a first axis representing carbon potential values, and a second axis representing temperatures and crossing the first axis.

Abstract: To provide a technology capable of preventing corrosion of a Cu wiring and thereby improving a production yield of a semiconductor device, a manufacturing method of a semiconductor device includes the steps of: removing a portion of a Cu film other than that in a wiring trench in a semiconductor substrate by CMP using a polishing slurry, removing a portion of a barrier metal film other than that in the, wiring trench by CMP using a polishing slurry containing an anticorrosive, polishing the surface of the Cu film and the surface of the barrier metal film by CMP using pure water, thereafter cleaning the semiconductor substrate with pure water without applying an anticorrosive thereto or without cleaning it with a chemical liquid, and thereafter cleaning the semiconductor substrate with a chemical liquid without applying an anticorrosive thereto.

Abstract: A Cu-CMP step applied to processes for 130 nm, 90 nm, and 65 nm technical nodes or the like mainly employs slurry to which an anticorrosive agent is added for preventing corrosion of Cu wiring. The inventors of the present application have studied and clearly found that in the Cu-CMP step using the slurry with the anticorrosive agent added thereto, the anticorrosive agent often forms complexes with Cu, which remain as foreign matter on a wafer in large quantity, leading to a reduction in yield, and in reliability of TDDB characteristics of the Cu wiring. In the invention of the present application, a post-CMP cleaning process involves applying wet cleaning to a wafer by supplying a cleaning solution, such as a chemical solution or pure water, to a device surface of the wafer substantially in a vertical direction with respect to the horizontal device surface, while rotating the wafer substantially about its center in the horizontal plane.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: A semiconductor substrate cleaning method includes a first cleaning step of cleaning the surface of a semiconductor substrate with the use of a first brush and a second cleaning step of cleaning the surface of the semiconductor substrate with the use of a second brush after the first cleaning step. The second cleaning step is performed under a condition that suppresses recontamination of the surface of the semiconductor substrate in comparison with the first cleaning step.

Abstract: A Cu-CMP step applied to processes for 130 nm, 90 nm, and 65 nm technical nodes or the like mainly employs slurry to which an anticorrosive agent is added for preventing corrosion of Cu wiring. The inventors of the present application have studied and clearly found that in the Cu-CMP step using the slurry with the anticorrosive agent added thereto, the anticorrosive agent often forms complexes with Cu, which remain as foreign matter on a wafer in large quantity, leading to a reduction in yield, and in reliability of TDDB characteristics of the Cu wiring. In the invention of the present application, a post-CMP cleaning process involves applying wet cleaning to a wafer by supplying a cleaning solution, such as a chemical solution or pure water, to a device surface of the wafer substantially in a vertical direction with respect to the horizontal device surface, while rotating the wafer substantially about its center in the horizontal plane.

Abstract: A method for manufacturing a magnetic memory device which includes a TMR element, and the method includes: a step of forming a lower wiring layer; a step of forming an interlayer insulating layer on the lower wiring layer; a step of forming an opening in the interlayer insulating layer so that the lower wiring layer is exposed; a step of forming a barrier metal layer so that the interlayer insulating layer and an inner surface of the opening are covered; a step of forming a metal layer on the barrier metal layer so that the opening is embedded; a polishing step of removing the metal layer on the barrier metal layer through polishing using the barrier metal layer as a stopper so that a wiring layer that includes a metal layer being embedded in the opening and the barrier metal layer is formed; and an element fabricating step of fabricating a TMR element on the wiring layer.

Abstract: A semiconductor substrate cleaning method includes a first cleaning step of cleaning the surface of a semiconductor substrate with the use of a first brush and a second cleaning step of cleaning the surface of the semiconductor substrate with the use of a second brush after the first cleaning step. The second cleaning step is performed under a condition that suppresses recontamination of the surface of the semiconductor substrate in comparison with the first cleaning step.

Abstract: At the time of performing a polishing process on a tungsten film and a silicon oxide film, based on the relation between a residual step and pattern density preliminarily obtained while changing polishing parameters, from pattern density of plugs in the polishing step and a predetermined residual step required, polishing parameters are determined so that a residual step does not exceed a predetermined residual step “h”. With the determined polishing parameters, the polishing process is performed on the tungsten film and the silicon oxide film so that the films are planarized, and plugs are formed in contact holes. As a result, a semiconductor device in which a step does not exceeds a predetermined residual step by a polishing process is obtained.

Abstract: At the time of performing a polishing process on a tungsten film and a silicon oxide film, based on the relation between a residual step and pattern density preliminarily obtained while changing polishing parameters, from pattern density of plugs in the polishing step and a predetermined residual step required, polishing parameters are determined so that a residual step does not exceed a predetermined residual step “h”. With the determined polishing parameters, the polishing process is performed on the tungsten film and the silicon oxide film so that the films are planarized, and plugs are formed in contact holes. As a result, a semiconductor device in which a step does not exceeds a predetermined residual step by a polishing process is obtained.

Abstract: A built-in starter type fluorescent lamp socket in which the starter is entirely incorporated with the socket with no protruding parts and in which it is not necessary to replace the starter. The socket includes a socket body, pairs of starter contacts and power source contacts operatively positioned in the socket body for making connection with fluorescent lamp pins, and an electronic starter positioned in the socket body and connected to the starter contacts. The electronic starter includes a non-linear dielectric element and a thyristor coupled in parallel and across the starter contacts. The anode of the thyristor is coupled through a Zener diode to the common connection point between voltage division resistors also coupled across the starter contacts. The socket body may include a casing having lamp pin inserting holes and a cover for covering the rear side of the casing wherein the cover may be shaped in the form of a box in which the electronic starter is mounted.