Patents by Inventor Hiroshi Ozaki
Hiroshi Ozaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12286542Abstract: An ink discharging device contains an ink containing an organic solvent with an SP value of from 9.0 to 12.0, a white pigment, a polyurethane resin with a glass transition temperature Tg of 0 degrees C. or lower, and water, and an ink discharging unit including a nozzle plate including a liquid repellent layer containing a silicone resin, the ink discharging unit for discharging the ink, wherein the proportion of the organic solvent to the entire of the ink is from 0.5 to 2.5 percent by mass and the proportion of the white pigment to the entire of the ink is from 6 to 15 percent by mass.Type: GrantFiled: March 16, 2023Date of Patent: April 29, 2025Assignee: Ricoh Company, Ltd.Inventors: Daisuke Ozaki, Toshiyuki Kobashi, Hiroshi Gotou, Ayaka Tanaka, Juichi Furukawa
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Publication number: 20250100427Abstract: Provided is a conveyance seat on which a seated occupant can spend time comfortably in an interior space (cabin) of a conveyance. A conveyance seat S1 includes a seat cushion 1, a rail device 50 (base member) that supports the seat cushion from a downward side, and connecting links 41 and 42 (connecting members) which are interposed between the seat cushion 1 and the rail device 50 in an up to down direction, and connect the seat cushion 1 and the rail device 50. Downward portions of the connecting links 41 and 42 are attached to the rail device 50 through a connecting bracket 60, or are attached to the rail device 50. Lower end portions of the connecting links 41 and 42 are disposed on a downward side as compared with an upper end portion of the rail device 50.Type: ApplicationFiled: December 1, 2022Publication date: March 27, 2025Inventors: Hiroshi BABA, Hiromi TANIGUCHI, Naoki OSAKAYA, Sadahiro KINOSHITA, Mika KUROSAWA, Hiroshi YOGO, Shoichi TAKAHASHI, Takuya OZAKI, Ryosuke SATO, Yuta OSHINO, Akira MIYOSHI, Munetaka KOWA
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Patent number: 12221549Abstract: A set of inkjet inks used for forming an image by application of an ink on a cloth is provided. The set includes an ink and a pre-processing fluid. The pre-processing fluid contains water, a compound that flocculates an anionic compound, and at least one emulsified sizing agent.Type: GrantFiled: October 27, 2022Date of Patent: February 11, 2025Assignee: Ricoh Company, Ltd.Inventors: Hiroshi Gotou, Toshiyuki Kobashi, Daisuke Ozaki, Juichi Furukawa
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Patent number: 12209185Abstract: The present invention relates to a compound represented by general formula (I) (in the formula (I), X represents a methyl group or a halogen atom; R1 to R14 each independently represent a hydrogen atom, a halogen atom, a cyano group, an optionally substituted alkyl group having 1 to 8 carbon atoms, or an optionally substituted aromatic hydrocarbon group having 6 to 12 carbon atoms; Bm? represents a polyoxometalate anion; m represents an integer of 1 to 20; n represents an integer of 1 to 20, provided that n is determined such that the charge of the whole formula (I) becomes zero).Type: GrantFiled: June 23, 2020Date of Patent: January 28, 2025Assignees: DIC CORPORATION, NAGASE VIITA CO., LTD.Inventors: Yusuke Ozaki, Ayaka Yamaji, Takako Tanaka, Daisuke Kuraoka, Noriaki Neki, Hiroshi Nagaike
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Patent number: 10848486Abstract: A system includes an authentication server that executes authentication processing via one or more biometric authentication methods. The system detects, in response to a request for proxy work, authentication target data related to biometric information from data acquired at a location where the request for the proxy work is issued. The system executes additional authentication processing, by comparing feature data of biometric information corresponding to a proxy executor included in proxy setting and the detected authentication target data. The system manages a status of the proxy work to be executed in a case where the additional authentication processing is successful.Type: GrantFiled: January 22, 2018Date of Patent: November 24, 2020Assignee: Canon Kabushiki KaishaInventor: Hiroshi Ozaki
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Publication number: 20200321228Abstract: [Object] Provided is a method of manufacturing a lead frame capable of forming connection terminals in a plurality of rows around a circuit chip without requiring a complex manufacturing process and many processes. [Solving Means] The method of manufacturing a lead frame includes attaching a tape member to a lead frame member including at least a lead frame rim. A lead frame part including at least one of a die pad or a connection terminal is mounted on the tape member in the lead frame rim.Type: ApplicationFiled: April 26, 2017Publication date: October 8, 2020Inventors: KOYO HOSOKAWA, HIROSHI OZAKI
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Patent number: 10717316Abstract: Provided is a coating film transfer tool comprising an external cassette and an internal cassette housed in the external cassette. The internal cassette includes a supply portion configured to supply transfer tape having a coating film on substrate tape. A pressing and transferring portion is configured to transfer the coating film to a film receiving surface by pressing the transfer tape against the film receiving surface, a take-up portion is configured to take up the substrate tape after the coating film is transferred, and a rotation-in-conjunction mechanism is configured to rotate the supply portion and the take-up portion in conjunction with each other. The external cassette includes a button and an elastic member. The pressing and transferring portion sticks out of the external cassette by the button being pressed, and the pressing and transferring portion retracts into the external cassette by the pressing of the button being stopped.Type: GrantFiled: November 30, 2016Date of Patent: July 21, 2020Assignee: FUJICOPIAN CO., LTD.Inventors: Kazuya Watanabe, Hiroshi Ozaki, Tomio Kaneda
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Patent number: 10672822Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.Type: GrantFiled: March 13, 2018Date of Patent: June 2, 2020Assignee: SONY CORPORATIONInventors: Satoru Wakiyama, Hiroshi Ozaki
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Patent number: 10483413Abstract: A photoelectric module of the present disclosure includes an optical device including an optical function element array made of a first base material, and a plurality of light emitting/receiving elements made of a second base material, wherein the optical function element array includes an optical substrate and a plurality of optical function elements, the optical substrate having a first surface and a second surface, and the optical function elements being integrated with the optical substrate and being arranged one-dimensionally or two-dimensionally, and the light emitting/receiving elements and their respective optical function elements face each other with the optical substrate in between to be located on a same axis in a direction perpendicular to the optical substrate, and the light emitting/receiving elements are disposed on the second surface with a space in between while being separated in units of a smaller number than array number in the optical function element array.Type: GrantFiled: April 23, 2015Date of Patent: November 19, 2019Assignee: Sony CorporationInventors: Hiizu Ootorii, Kazunao Oniki, Koki Uchino, Hideyuki Suzuki, Hiroshi Ozaki, Kazuki Sano, Eiji Otani, Shinji Rokuhara, Kiwamu Adachi, Shuichi Oka, Shusaku Yanagawa, Hiroshi Morita, Takeshi Ogura
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Patent number: 10256117Abstract: There is provided a method for manufacturing a wiring substrate with a through electrode, the method including providing a device substrate having a through hole, an opening of the through hole being blocked by a current supply path and the wiring substrate including the device substrate as a core layer with the through electrode; and disposing a first metal in the through hole to form the through electrode by electroplating, in a depth direction of the through hole, using the current supply path.Type: GrantFiled: April 25, 2016Date of Patent: April 9, 2019Assignee: Sony CorporationInventors: Shun Mitarai, Shusaku Yanagawa, Hiroshi Ozaki
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Publication number: 20180370275Abstract: Provided is a coating film transfer tool comprising an external cassette and an internal cassette housed in the external cassette. The internal cassette includes a supply portion configured to supply transfer tape having a coating film on substrate tape. A pressing and transferring portion is configured to transfer the coating film to a film receiving surface by pressing the transfer tape against the film receiving surface, a take-up portion is configured to take up the substrate tape after the coating film is transferred, and a rotation-in-conjunction mechanism is configured to rotate the supply portion and the take-up portion in conjunction with each other. The external cassette includes a button and an elastic member. The pressing and transferring portion sticks out of the external cassette by the button being pressed, and the pressing and transferring portion retracts into the external cassette by the pressing of the button being stopped.Type: ApplicationFiled: November 30, 2016Publication date: December 27, 2018Applicant: FUJICOPIAN CO., LTD.Inventors: Kazuya Watanabe, Hiroshi Ozaki, Tomio Kaneda
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Publication number: 20180212961Abstract: A system includes an authentication server that executes authentication processing via one or more biometric authentication methods. The system detects, in response to a request for proxy work, authentication target data related to biometric information from data acquired at a location where the request for the proxy work is issued. The system executes additional authentication processing, by comparing feature data of biometric information corresponding to a proxy executor included in proxy setting and the detected authentication target data. The system manages a status of the proxy work to be executed in a case where the additional authentication processing is successful.Type: ApplicationFiled: January 22, 2018Publication date: July 26, 2018Inventor: Hiroshi Ozaki
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Publication number: 20180204872Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.Type: ApplicationFiled: March 13, 2018Publication date: July 19, 2018Inventors: SATORU WAKIYAMA, HIROSHI OZAKI
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Patent number: 10026770Abstract: Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.Type: GrantFiled: June 22, 2017Date of Patent: July 17, 2018Assignee: Sony CorporationInventors: Satoru Wakiyama, Hiroshi Ozaki
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Publication number: 20180158695Abstract: There is provided a method for manufacturing a wiring substrate with a through electrode, the method including providing a device substrate having a through hole, an opening of the through hole being blocked by a current supply path and the wiring substrate including the device substrate as a core layer with the through electrode; and disposing a first metal in the through hole to form the through electrode by electroplating, in a depth direction of the through hole, using the current supply path.Type: ApplicationFiled: April 25, 2016Publication date: June 7, 2018Applicant: Sony CorporationInventors: Shun MITARAI, Shusaku YANAGAWA, Hiroshi OZAKI
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Patent number: 9941322Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.Type: GrantFiled: October 22, 2015Date of Patent: April 10, 2018Assignee: SONY CORPORATIONInventors: Satoru Wakiyama, Hiroshi Ozaki
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Publication number: 20170287968Abstract: Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.Type: ApplicationFiled: June 22, 2017Publication date: October 5, 2017Inventors: Satoru Wakiyama, Hiroshi Ozaki
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Publication number: 20170263581Abstract: [Object] To provide an electronic device, a part mounting board, and an electronic apparatus that are capable of preventing warpage of a board from occurring. [Solving Means] An electronic device according to an embodiment of the present technology includes a first circuit board and a second circuit board. The first circuit board includes a first main surface, a second main surface, and a plurality of external terminals. The plurality of external terminals include a first terminal group located at an outermost periphery of the first main surface, and are arranged on the first main surface in a matrix pattern. The second circuit board includes a terminal surface facing the second main surface, and a plurality of connection terminals. The plurality of connection terminals include a second terminal group that is arranged on the terminal surface and faces at least a part of the first terminal group, and are electrically connected to the second main surface.Type: ApplicationFiled: August 18, 2015Publication date: September 14, 2017Inventors: KUNIHIKO SARUTA, HIROSHI OZAKI, HIDETOSHI KABASAWA
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Patent number: 9727285Abstract: In an information processing apparatus according to this invention, a plurality of pieces of batch setting information each configured by a plurality of pieces of print setting information are registered in advance. A setting of print setting information, use of which is inhibited, of the plurality of pieces of print setting information is accepted. Batch setting information including the print setting information, use of which is inhibited, is specified from the plurality of pieces of batch setting information. Then, a setting screen which allows the user to select pieces of non-specified batch setting information, and does not allow the user to select the specified batch setting information is displayed.Type: GrantFiled: February 21, 2014Date of Patent: August 8, 2017Assignee: Canon Kabushiki KaishaInventor: Hiroshi Ozaki
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Patent number: 9691805Abstract: Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.Type: GrantFiled: January 29, 2016Date of Patent: June 27, 2017Assignee: Sony CorporationInventors: Satoru Wakiyama, Hiroshi Ozaki