Patents by Inventor Hiroshi Ryu

Hiroshi Ryu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method, and apparatus for simulating a system using an object oriented language
    Patent number: 6882966
    Abstract: The simulation method of the present invention for simulating a system having a plurality of circuit modules using software, comprises the steps of: using an object oriented language; preparing a plurality of circuit base classes, which describe base circuit modules as classes, as a library; describing the circuit modules, to be simulated, as classes by inheriting the circuit base classes prepared as the library; and describing the system, to be simulated, by combining the circuit modules described as the classes.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: April 19, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Hiroshi Ryu, Yusuke Katoh
  • Method of manufacturing a substrate with directionally anisotropic warping
    Patent number: 6479318
    Abstract: A semiconductor device substrate which can be easily conveyed and a semiconductor device fabrication method using the substrate. The semiconductor device fabrication method includes forming a solder resist on a semiconductor element mounting plate-shaped substrate having major and minor sides and containing organic matter, having a linear expansion coefficient A different from that of the substrate, warping the substrate along a minor-side direction, and conveying the warped substrate.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: November 12, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Itaru Matsuo, Hiroshi Ryu, Kayo Miyamura
  • Semiconductor device substrate and semiconductor device fabrication method
    Publication number: 20020064899
    Abstract: To provide a semiconductor device substrate which can be easily conveyed and a semiconductor device fabrication method using the substrate. The semiconductor device fabrication method includes a step of forming a solder resist, on a semiconductor element mounting plate-shaped substrate having major and minor sides and containing an organic matter, having a linear expansion coefficient A different fiom that of the substrate, a step of warping the substrate on which the solder resist is formed in its minor-side direction, and a step of conveying the warped substrate.
    Type: Application
    Filed: April 20, 2001
    Publication date: May 30, 2002
    Inventors: Itaru Matsuo, Hiroshi Ryu, Kayo Miyamura
  • Method, and apparatus for simulating a system using an object oriented language
    Publication number: 20010021903
    Abstract: The simulation method of the present invention for simulating a system having a plurality of circuit modules using software, comprises the steps of: using an object oriented language; preparing a plurality of circuit base classes, which describe base circuit modules as classes, as a library; describing the circuit modules, to be simulated, as classes by inheriting the circuit base classes prepared as the library; and describing the system, to be simulated, by combining the circuit modules described as the classes.
    Type: Application
    Filed: December 1, 2000
    Publication date: September 13, 2001
    Inventors: Hiroshi Ryu, Yusuke Katoh