Patents by Inventor Hiroshi Sata

Hiroshi Sata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110314854
    Abstract: A refrigerator provided with a refrigerant circuit in which a compressor, a condenser, a liquid container, a supercooling heat exchange portion, a throttle valve, and an evaporator connected in this order by piping, a return circuit that branches from a downstream position in a refrigerant flowing direction of the supercooling heat exchange portion in the refrigerant circuit and leads to an intermediate-pressure chamber of the compressor via the supercooling heat exchange portion, a supercooling throttle valve with a variable valve opening-degree that is disposed on a refrigerant inlet side of the supercooling heat exchange portion in the return circuit, and operation state detecting means that detects operation state data in the refrigerant circuit, in which dryness-degree calculating means that calculates a dryness-degree of the refrigerant on the outlet side of the supercooling heat exchange portion in the return circuit on the basis of the detected operation state data and supercooling throttle valve cont
    Type: Application
    Filed: March 19, 2010
    Publication date: December 29, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Hiroshi Sata, Tomotaka Ishikawa, Yasutaka Ochiai, Kousuke Tanaka, Takashi Ikeda
  • Patent number: 7982842
    Abstract: An interconnect structure for a display device includes a driver from which display data are supplied, and an interconnect material having a plurality of signal lines disposed in parallel through which the display data are supplied from the driver. In the interconnect structure for a display device, the signal lines from which the display data are transmitted via the interconnect material are rearranged such that the display data via the signal lines having a comparatively larger effect of the inductance components and the display data via the signal lines having a comparatively smaller effect of the inductance components in the interconnect material are alternately supplied to adjacent pixels or groups of pixels of the display device. As a result, an image is displayed based on the luminance suitable for the display data.
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: July 19, 2011
    Assignee: Sony Corporation
    Inventors: Hideaki Kawaura, Koichi Katagawa, Hiroshi Sata
  • Patent number: 7541731
    Abstract: A flat-panel display includes a cathode panel including a plurality of electron emission regions, and an anode panel including a fluorescent layer and an anode electrode, both panels being bonded together in a peripheral region and holding a vacuum space therebetween; a plurality of spacers disposed between the cathode panel and the anode panel; a high-resistance layer provided between the anode panel and each of the spacers; and a conductor layer provided on a portion of each of the spacers which contacts the cathode panel.
    Type: Grant
    Filed: August 18, 2006
    Date of Patent: June 2, 2009
    Assignee: Sony Corporation
    Inventors: Hiroshi Sata, Satoshi Okanan, Keiji Honda, Yoshimitsu Kato, Atsushi Seki
  • Patent number: 7388325
    Abstract: A flat-type display device is provided. The flat-type panel display includes a cathode panel having a plurality of electron emitter areas formed on a support; and an anode panel having formed on a substrate a plurality of fluorescent regions and an anode electrode covering at least the fluorescent regions, in which the cathode panel and the anode panel are joined together at their edges with a joint member in between. In the display device, the anode panel has formed on the anode electrode an electron absorbing layer for absorbing electrons from any one of the fluorescent regions and the anode electrode or both, and the anode panel has an adhesion improving layer formed between the anode electrode and the electron absorbing layer.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: June 17, 2008
    Assignee: Sony Corporation
    Inventors: Yoshimitsu Kato, Satoshi Okanan, Keiji Honda, Masaru Kokubukata, Hiroshi Sata
  • Publication number: 20070171216
    Abstract: An interconnect structure for a display device includes a driver from which display data are supplied, and an interconnect material having a plurality of signal lines disposed in parallel through which the display data are supplied from the driver. In the interconnect structure for a display device, the signal lines from which the display data are transmitted via the interconnect material are rearranged such that the display data via the signal lines having a comparatively larger effect of the inductance components and the display data via the signal lines having a comparatively smaller effect of the inductance components in the interconnect material are alternately supplied to adjacent pixels or groups of pixels of the display device. As a result, an image is displayed based on the luminance suitable for the display data.
    Type: Application
    Filed: January 12, 2007
    Publication date: July 26, 2007
    Inventors: Hideaki Kawaura, Koichi Katagawa, Hiroshi Sata
  • Publication number: 20070096623
    Abstract: A flat-type display device is provided. The flat-type panel display includes a cathode panel having a plurality of electron emitter areas formed on a support; and an anode panel having formed on a substrate a plurality of fluorescent regions and an anode electrode covering at least the fluorescent regions, in which the cathode panel and the anode panel are joined together at their edges with a joint member in between. In the display device, the anode panel has formed on the anode electrode an electron absorbing layer for absorbing electrons from any one of the fluorescent regions and the anode electrode or both, and the anode panel has an adhesion improving layer formed between the anode electrode and the electron absorbing layer.
    Type: Application
    Filed: October 24, 2006
    Publication date: May 3, 2007
    Applicant: Sony Corporation
    Inventors: Yoshimitsu Kato, Satoshi Okanan, Keiji Honda, Masaru Kokubukata, Hiroshi Sata
  • Patent number: 7204739
    Abstract: A cathode panel for a cold cathode field emission display, comprising; (a) a plurality of main wirings, (b) a plurality of branch wirings extending from each main wiring, and (c) cold cathode electron emitting portions connected to the branch wirings, wherein a branch wiring connecting a cold cathode electron emitting portion defective in operation and a main wiring is cut off.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: April 17, 2007
    Assignee: Sony Corporation
    Inventors: Yukihiro Kamide, Shinji Kubota, Hiroshi Sata, Kazuo Kikuchi
  • Publication number: 20070046163
    Abstract: A flat-panel display includes a cathode panel including a plurality of electron emission regions, and an anode panel including a fluorescent layer and an anode electrode, both panels being bonded together in a peripheral region and holding a vacuum space therebetween; a plurality of spacers disposed between the cathode panel and the anode panel; a high-resistance layer provided between the anode panel and each of the spacers; and a conductor layer provided on a portion of each of the spacers which contacts the cathode panel.
    Type: Application
    Filed: August 18, 2006
    Publication date: March 1, 2007
    Inventors: Hiroshi Sata, Satoshi Okanan, Keiji Honda, Yoshimitsu Kato, Atsushi Seki
  • Publication number: 20050236964
    Abstract: A cathode panel for a cold cathode field emission display, comprising; (a) a plurality of main wirings, (b) a plurality of branch wirings extending from each main wiring, and (c) cold cathode electron emitting portions connected to the branch wirings, wherein a branch wiring connecting a cold cathode electron emitting portion defective in operation and a main wiring is cut off.
    Type: Application
    Filed: April 26, 2005
    Publication date: October 27, 2005
    Inventors: Yukikhiro Kamide, Shinji Kubota, Hiroshi Sata, Kazuo Kikuchi
  • Patent number: 6917155
    Abstract: A cathode panel for a cold cathode field emission display, comprising; (a) a plurality of main wirings, (b) a plurality of branch wirings extending from each main wiring, and (c) cold cathode electron emitting portions connected to the branch wirings, wherein a branch wiring connecting a cold cathode electron emitting portion defective in operation and a main wiring is cut off.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: July 12, 2005
    Assignee: Sony Corporation
    Inventors: Yukihiro Kamide, Shinji Kubota, Hiroshi Sata, Kazuo Kikuchi
  • Patent number: 6520820
    Abstract: A cold cathode field emission device comprising; (A) a cathode electrode formed on a support, (B) an insulating layer formed on the support and the cathode electrode, (C) a gate electrode formed on the insulating layer, (D) an opening portion which penetrates through the gate electrode and the insulating layer, and (E) an electron emitting portion which is positioned at a bottom portion of the opening portion and has a tip portion having a conical form and being composed of a crystalline conductive material, the tip portion of the electron emitting portion having a crystal boundary nearly perpendicular to the cathode electrode.
    Type: Grant
    Filed: November 5, 2001
    Date of Patent: February 18, 2003
    Assignee: Sony Corporation
    Inventors: Shinji Kubota, Kazuo Kikuchi, Hiroshi Sata
  • Patent number: 6465941
    Abstract: A cold cathode field emission device comprising; (A) a cathode electrode formed on a support, (B) an insulating layer formed on the support and the cathode electrode, (C) a gate electrode formed on the insulating layer, (D) an opening portion which penetrates through the gate electrode and the insulating layer, and (E) an electron emitting portion which is positioned at a bottom portion of the opening portion and has a tip portion having a conical form and being composed of a crystalline conductive material, the tip portion of the electron emitting portion having a crystal boundary nearly perpendicular to the cathode electrode.
    Type: Grant
    Filed: December 3, 1999
    Date of Patent: October 15, 2002
    Assignee: Sony Corporation
    Inventors: Shinji Kubota, Kazuo Kikuchi, Hiroshi Sata
  • Publication number: 20020050776
    Abstract: A cold cathode field emission device comprising; (A) a cathode electrode formed on a support, (B) an insulating layer formed on the support and the cathode electrode, (C) a gate electrode formed on the insulating layer, (D) an opening portion which penetrates through the gate electrode and the insulating layer, and (E) an electron emitting portion which is positioned at a bottom portion of the opening portion and has a tip portion having a conical form and being composed of a crystalline conductive material, the tip portion of the electron emitting portion having a crystal boundary nearly perpendicular to the cathode electrode.
    Type: Application
    Filed: November 5, 2001
    Publication date: May 2, 2002
    Inventors: Shinji Kubota, Kazuo Kikuchi, Hiroshi Sata
  • Patent number: 5963827
    Abstract: To provide a method for producing the semiconductor device in which contactability between a dielectric layer and a contact layer is not reduced during the formation of a metal plug, the method comprises forming a semiconductor device including a base; forming a lower conductive layer on the base; forming a dielectric layer formed on the lower conductive layer; forming an opening in the dielectric layer for electrically connecting the lower conductive layer with an upper conductive layer to be formed on the dielectric layer; forming a first contact layer formed on at least a bottom surface of the via hole and made of a single TiON layer, any portions of said first contact layer formed on the dielectric layer being removed; forming a second contact layer over an entire exposed surface of the first contact layer, depositing tungsten on the second contact layer by a chemical vapor deposition method; and removing portions of the second contact layer formed on the dielectric layer while leaving a tungsten plug and
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 5, 1999
    Assignee: Sony Corporation
    Inventors: Yoshiyuki Enomoto, Hiroshi Sata
  • Patent number: 4714900
    Abstract: A bipolar transistor circuit is disclosed, which receives input voltage signals and outputs a current of a polarity in accordance with the input signals and of a predetermined amplitude. This circuit includes a first current source producing a first reference current, an output terminal, bipolar switching transistors coupled between the first current source and the output terminal and controlled by the input voltage signals to supply to the output terminal an output current of a first polarity which has an amplitude of the first reference current minus a base current of the switching transistor or integer times of that amplitude, a current producing circuit producing a current that is substantially equal to the base current of the switching transistor, and a second current source connected to the output terminal and producing a second reference current of a second polarity which has an amplitude of the first reference current minus the amplitude of the current produced by the current producing circuit.
    Type: Grant
    Filed: November 21, 1986
    Date of Patent: December 22, 1987
    Assignee: NEC Corporation
    Inventor: Hiroshi Sata
  • Patent number: D603495
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: November 3, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Sata, Takashi Ikeda, Tetsuya Yamashita, Koji Asakura, Koichi Higashi
  • Patent number: D604400
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: November 17, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Sata, Takashi Ikeda, Tetsuya Yamashita, Koji Asakura, Koichi Higashi
  • Patent number: D605271
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: December 1, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Sata, Takashi Ikeda, Tetsuya Yamashita, Koji Asakura, Koichi Higashi
  • Patent number: D617886
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: June 15, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Sata, Takashi Ikeda, Tetsuya Yamashita, Koji Asakura, Koichi Higashi
  • Patent number: D617887
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: June 15, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hiroshi Sata, Takashi Ikeda, Tetsuya Yamashita, Koji Asakura, Koichi Higashi