Patents by Inventor Hiroshi Sekiyama

Hiroshi Sekiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030053893
    Abstract: A substrate processing apparatus includes at least two processing units provided around a substrate transfer chamber including a substrate transfer device for transferring substrates, wherein said at least two processing units include at least one batch processing unit, an M number of product substrates being processed simultaneously in one batch process with M being set to be less than or equal to the number of product substrates carried by a product substrate carrier, and all the product substrates contained in a product substrate carried by the product substrate carrier being processed in one batch process of said at least one batch processing unit. A method for fabricating a semiconductor device includes the step of sequentially processing plural product substrates in at least two processing units arranged around a substrate transfer chamber.
    Type: Application
    Filed: August 29, 2002
    Publication date: March 20, 2003
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Tatsuhisa Matsunaga, Hiroshi Sekiyama, Kouichi Noto
  • Publication number: 20030000476
    Abstract: A substrate processing apparatus includes a process chamber, a sealed chamber arranged, a movable member disposed inside the sealed chamber, an extendable/contractible structure having a first and a second extendable/contractible member respectively disposed on both opposing sides of the movable member, and a driving mechanism, disposed in the extendable/contractible structure, for driving the movable member. The driving mechanism is isolated from an inner surface of the sealed chamber. The interiors of the first and the second extendable/contractible member communicate with an exterior of the sealed chamber.
    Type: Application
    Filed: March 27, 2002
    Publication date: January 2, 2003
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Tatsuhisa Matsunaga, Hiroshi Sekiyama
  • Publication number: 20020070095
    Abstract: Particles are prevented from clinging to the back of a wafer in the notch alignment of the wafer, and the problems encountered when a plurality of wafers were aligned all at once are solved. Three support poles 105 are erected on a turntable 103. The substrate outer periphery 104b of wafers 104 is supported by the tapered portions of support pins 107 protruding from the support poles 105. The turntable 103 is driven by a single motor 106, and all of the wafers 104 are rotated at once. During rotation, the notches 104a of all the wafers 104 are detected by an optical sensor 116 provided to a sensor pole 117, and the angular position thereof is stored. The wafers 104 are rotated on the basis of the angular position data, and notch alignment is performed successively, starting with the bottom wafer 104.
    Type: Application
    Filed: February 14, 2002
    Publication date: June 13, 2002
    Applicant: KOUSAI ELECTRIC CO., LTD.
    Inventors: Akihiro Osaka, Hiroshi Sekiyama, Kouichi Noto, Masaki Sugawara
  • Patent number: 6368049
    Abstract: Particles are prevented from clinging to the back of a water in the notch alignment of the wafer, and the problems encountered when a plurality of wafers were aligned all at once are solved. Three support poles 105 are erected on a turntable 103. The substrate outer periphery 104b of wafers 104 is supported by the tapered portions of support pins 107 protruding from the support poles 105. The turntable 103 is driven by a single motor 106, and all of the wafers 104 are rotated at once. During rotation, the notches 104a of al the wafers 104 are detected by an optical sensor 116 provided to a sensor pole 117, and the angular position thereof is stored. The wafers 104 are rotated an the basis of the angular position data, and notch alignment is performed successively, starting with the bottom wafer 104.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: April 9, 2002
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Akihiro Osaka, Hiroshi Sekiyama, Kouichi Noto, Masaki Sugawara
  • Patent number: 4819327
    Abstract: This invention relates to a method of soldering electronic components for a printed circuit board by dipping the printed circuit board into a molten solder inside a soldering bath. When the printed circuit board is dipped into the molten solder inside the soldering bath, it is dipped together with a member that attracts the molten solder, and when the printed circuit board is pulled up from the molten solder, it is pulled up while the edge of the member keeps contact with a solder connection portion of the printed circuit board. After the printed circuit board is pulled from the molten solder, the edge of the member is separated from the printed circuit board to remove any excessive solder adhering to the connection portion by the surface tension of the solder.
    Type: Grant
    Filed: February 24, 1987
    Date of Patent: April 11, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Syuuzi Tatsuoka, Hiroshi Sekiyama, Kanji Ishige