Patents by Inventor Hiroshi Shikauchi

Hiroshi Shikauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10833184
    Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 10, 2020
    Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ken Sato, Hiroshi Shikauchi, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
  • Patent number: 10679984
    Abstract: A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes: a unipolar component at least including an epitaxial layer; a transition layer connected to the epitaxial layer; and a bypass component connected to the transition layer; the unipolar component and the bypass component are connected in parallel and the transition layer is configured between the unipolar component and the bypass component.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 9, 2020
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroshi Shikauchi, Satoru Washiya, Yuki Tanaka, Ning Wei
  • Patent number: 10586701
    Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of s
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: March 10, 2020
    Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
  • Patent number: 10553674
    Abstract: A substrate for semiconductor device includes a substrate, a buffer layer which is provided on the substrate and made of a nitride semiconductor, and a device active layer which is provided on the buffer layer and composed of a nitride semiconductor layer, wherein the buffer layer contains carbon and iron, a carbon concentration of an upper surface of the buffer layer is higher than a carbon concentration of a lower surface of the buffer layer, and an iron concentration of the upper surface of the buffer layer is lower than an iron concentration of the lower surface of the buffer layer. As a result, the substrate for semiconductor device can reduce a leak current in a lateral direction at the time of a high-temperature operation while suppressing a leak current in a longitudinal direction.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: February 4, 2020
    Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ken Sato, Hiroshi Shikauchi, Hirokazu Goto, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
  • Publication number: 20200020682
    Abstract: A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes: a unipolar component at least including an epitaxial layer; a transition layer connected to the epitaxial layer; and a bypass component connected to the transition layer; the unipolar component and the bypass component are connected in parallel and the transition layer is configured between the unipolar component and the bypass component.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 16, 2020
    Applicant: Sanken Electric Co., Ltd.
    Inventors: Hiroshi SHIKAUCHI, Satoru WASHIYA, Yuki TANAKA, Ning WEI
  • Publication number: 20200020679
    Abstract: A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes: a unipolar component at least including a first epitaxial layer and a first substrate; and a bypass component at least including a second epitaxial layer and a second substrate; the unipolar component and the bypass component are connected in parallel; a difference of a thickness of the unipolar component and a thickness of the bypass component is lower than or equal to a predetermined value.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 16, 2020
    Applicant: Sanken Electric Co., Ltd.
    Inventors: Hiroshi SHIKAUCHI, Satoru WASHIYA, Yuki TANAKA, Ning WEI
  • Patent number: 10529842
    Abstract: A semiconductor base substance includes: a substrate; a buffer layer which is made of a nitride semiconductor and provided on the substrate; and a channel layer which is made of a nitride semiconductor and provided on the buffer layer, wherein the buffer layer includes: a first region which is provided on the substrate side and has boron concentration higher than acceptor element concentration; and a second region which is provided on the first region, and has boron concentration lower than that in the first region and acceptor element concentration higher than that in the first region. As a result, the semiconductor base substance which can obtain a high pit suppression effect while maintaining a high longitudinal breakdown voltage is provided.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: January 7, 2020
    Assignees: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroshi Shikauchi, Ken Sato, Masaru Shinomiya, Keitaro Tsuchiya, Kazunori Hagimoto
  • Patent number: 10410978
    Abstract: A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: September 10, 2019
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroshi Shikauchi, Tomonori Hotate, Yuki Tanaka, Shinji Kudoh
  • Publication number: 20190229069
    Abstract: A semiconductor wafer and a method for forming a semiconductor. The semiconductor wafer includes: a first semiconductor component having a first device; a second semiconductor component having a second device; an insulation layer laterally extending to the first semiconductor component and the second semiconductor component; and a grind layer configured on or adjacent to a backside of the semiconductor wafer. Therefore, chipping or cracking can be decreased or avoided when the grind layer is exposed during the thinning process (such as backside grinding).
    Type: Application
    Filed: January 24, 2018
    Publication date: July 25, 2019
    Applicant: Sanken Electric Co., Ltd.
    Inventors: Hiroshi SHIKAUCHI, Tomonori HOTATE, Yuki TANAKA, Shinji KUDOH
  • Publication number: 20190214492
    Abstract: A semiconductor device substrate including: a substrate; a buffer layer which is provided on the substrate and made of a nitride semiconductor; and a device active layer which is formed of a nitride semiconductor layer provided on the buffer layer, the semiconductor device substrate in that the buffer layer includes: a first region which contains carbon and iron; a second region which is provided on the first region and has average concentration of iron lower than that in the first region and average concentration of carbon higher than that in the first region, and the average concentration of the carbon in the second region is lower than the average concentration of the iron in the first region. The semiconductor device substrate which can suppress a transverse leak current in a high-temperature operation of a device while suppressing a longitudinal leak current and can inhibit a current collapse phenomenon is provided.
    Type: Application
    Filed: February 24, 2017
    Publication date: July 11, 2019
    Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Ken SATO, Hiroshi SHIKAUCHI, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
  • Publication number: 20190206748
    Abstract: A semiconductor device and a method for detecting a crack of the semiconductor device are provided. The semiconductor device includes a crack sensor having a SBD structure; the SBD structure at least is configured on a first side of a semiconductor body and configured to detect a crack on the first side of the semiconductor body. Therefore, a crack on the surface of the semiconductor device can be detected by the crack sensor with high precision and simple structure.
    Type: Application
    Filed: December 28, 2017
    Publication date: July 4, 2019
    Applicant: Sanken Electric Co., Ltd.
    Inventors: Hiroshi SHIKAUCHI, Tomonori HOTATE, Yuki TANAKA, Shinji KUDOH
  • Patent number: 10319587
    Abstract: A method of manufacturing an epitaxial wafer having an epitaxial layer on a silicon-based substrate, the method of manufacturing the epitaxial wafer including epitaxially growing a semiconductor layer on the silicon-based substrate after applying terrace processing to an outer peripheral portion of the silicon-based substrate. As a result, the method of manufacturing the epitaxial wafer having the epitaxial layer on the silicon-based substrate in which an epitaxial wafer which is completely free from cracks can be obtained, is provided.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: June 11, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
  • Patent number: 10297557
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: May 21, 2019
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroshi Shikauchi, Satoru Washiya, Youhei Ohno, Tomonori Hotate, Hiromichi Kumakura
  • Publication number: 20190051515
    Abstract: Semiconductor base including: silicon-based substrate; buffer layer including first and second layers alternately on silicon-based substrate, first layer made of nitride-based compound semiconductor containing first material, second layer made of nitride-based compound semiconductor containing second material having larger lattice constant than first material; channel layer on buffer layer and made of nitride-based compound semiconductor containing second material, buffer layer has: first composition graded layer between at least one of first layers and second layer immediately thereabove, made of nitride-based compound semiconductor whose composition ratio of second material is increased gradually upward, whose composition ratio of first material is decreased gradually upward; second composition graded layer between at least one of second layers and first layer immediately thereabove, made of nitride-based compound semiconductor whose first material is increased gradually upward, whose composition ratio of s
    Type: Application
    Filed: February 26, 2016
    Publication date: February 14, 2019
    Applicants: SANKEN ELECTRIC CO., LTD., SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Hiroshi SHIKAUCHI, Ken SATO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Kazunori HAGIMOTO
  • Publication number: 20190035899
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a middle region which is configured between an upper region and a lower region; a doping concentration of a first conductivity type in the middle region is lower than the doping concentration of the first conductivity type in a drift layer. Therefore, a depletion layer may be extended and connected to the lower region when a backward biasing voltage is applied; an electric field of the upper region may be reduced.
    Type: Application
    Filed: July 28, 2017
    Publication date: January 31, 2019
    Inventors: Hiroko KAWAGUCHI, Hiroshi SHIKAUCHI, Hiromichi KUMAKURA, Shinji KUDOH, Yuki TANAKA
  • Patent number: 10186586
    Abstract: A semiconductor device and a method for forming the semiconductor device. The semiconductor device includes a first semiconductor region having a first conductivity type; and a second semiconductor region having a second conductivity type. The first semiconductor region is configured within the second semiconductor region and a plurality of crystal defects are formed in the second semiconductor region and at least part of the first semiconductor region is surrounded by the plurality of crystal defects. Therefore, recombination of charge carriers (electrons and holes) on a lateral direction and a longitudinal direction could be taken into account, and the switching time of the semiconductor device could be adequately decreased.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: January 22, 2019
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroko Kawaguchi, Hiroshi Shikauchi, Hiromichi Kumakura, Shinji Kudoh
  • Publication number: 20190006292
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide substrate and a protective film covering at least partly a main surface of the silicon carbide substrate and one or more side surfaces of the silicon carbide substrate. Therefore, contact of the side surface of the silicon carbide substrate with the moisture gathering material may be avoided, and the breakdown behavior and the long-term reliability of the semiconductor device may be further improved.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventors: Hiroshi SHIKAUCHI, Satoru WASHIYA, Youhei OHNO, Tomonori HOTATE, Hiromichi KUMAKURA
  • Patent number: 10158013
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: December 18, 2018
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Hiroshi Shikauchi, Satoru Washiya, Youhei Ohno, Tomonori Hotate, Hiromichi Kumakura
  • Publication number: 20180350982
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes a silicon carbide drift layer, a buried silicon carbide layer and an oxide semiconductor layer; the buried silicon carbide layer is located within the silicon carbide drift layer and the buried silicon carbide layer is covered by the oxide semiconductor layer. Therefore, breakdown behavior and/or long-time reliability of the semiconductor device may be further improved.
    Type: Application
    Filed: June 1, 2017
    Publication date: December 6, 2018
    Inventors: Hiroshi SHIKAUCHI, Satoru WASHIYA, Youhei OHNO, Tomonori HOTATE, Hiromichi KUMAKURA
  • Patent number: 10115589
    Abstract: An epitaxial substrate for electronic devices, including: a Si-based substrate; an AlN initial layer provided on the Si-based substrate; and a buffer layer provided on the AlN initial layer, wherein the roughness Sa of the surface of the AlN initial layer on the side where the buffer layer is located is 4 nm or more. As a result, an epitaxial substrate for electronic devices, in which V pits in a buffer layer structure can be suppressed and longitudinal leakage current characteristics can be improved when an electronic device is fabricated therewith, is provided.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: October 30, 2018
    Assignees: SHIN-ETSU HANDOTAI CO., LTD., SANKEN ELECTRIC CO., LTD.
    Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi