Patents by Inventor Hiroshi Shimmura

Hiroshi Shimmura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Storage system and data transfer control method
    Patent number: 8924606
    Abstract: It is provided a storage system for inputting and outputting data in accordance with a request from a host computer, comprising: at least one processor for processing data requested to be input or output; a plurality of transfer controllers for transferring data between memories in the storage system; and at least one transfer sequencer for requesting a data transfer to the plurality of transfer controllers in accordance with an instruction from the processor. The processor transmits a series of data transfer requests to the at least one transfer sequencer. The at least one transfer sequencer requests a data transfer to each of the plurality of transfer controllers based on the series of data transfer requests. The each transfer controller transfers data between the memories in accordance with an instruction from the at least one transfer sequencer.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: December 30, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Koji Akiyama, Susumu Tsuruta, Hideaki Fukuda, Hiroshi Shimmura, Shoji Kato
  • STORAGE SYSTEM AND DATA TRANSFER CONTROL METHOD
    Publication number: 20130232284
    Abstract: It is provided a storage system for inputting and outputting data in accordance with a request from a host computer, comprising: at least one processor for processing data requested to be input or output; a plurality of transfer controllers for transferring data between memories in the storage system; and at least one transfer sequencer for requesting a data transfer to the plurality of transfer controllers in accordance with an instruction from the processor. The processor transmits a series of data transfer requests to the at least one transfer sequencer. The at least one transfer sequencer requests a data transfer to each of the plurality of transfer controllers based on the series of data transfer requests. The each transfer controller transfers data between the memories in accordance with an instruction from the at least one transfer sequencer.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 5, 2013
    Inventors: Koji Akiyama, Susumu Tsuruta, Hideaki Fukuda, Hiroshi Shimmura, Shoji Kato