Patents by Inventor Hiroshi Shimoe

Hiroshi Shimoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6734541
    Abstract: A semiconductor laminated module comprises a plurality of unit packages in which semiconductor chips are bonded to base substrates with a first adhesive, a second adhesive to form a laminated body by bonding the plurality of unit packages to each other, a third adhesive formed to cover an upper surface of the semiconductor chips and having substantially the same thermal expansion coefficient as that of the first adhesive, and an uppermost substrate bonded to uppermost one of the unit packages with the second adhesive.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: May 11, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Shimoe, Naohisa Okumura, Takashi Imoto, Ryuji Hosokawa
  • Publication number: 20020190368
    Abstract: A semiconductor laminated module comprises a plurality of unit packages in which semiconductor chips are bonded to base substrates with a first adhesive, a second adhesive to form a laminated body by bonding the plurality of unit packages to each other, a third adhesive formed to cover an upper surface of the semiconductor chips and having substantially the same thermal expansion coefficient as that of the first adhesive, and an uppermost substrate bonded to uppermost one of the unit packages with the second adhesive.
    Type: Application
    Filed: June 18, 2002
    Publication date: December 19, 2002
    Applicant: KABUSHIKI KAISHI TOSHIBA
    Inventors: Hiroshi Shimoe, Naohisa Okumura, Takashi Imoto, Ryuji Hosokawa
  • Patent number: 6429372
    Abstract: An IC chip and overhang portions are stuck to tape by an adhesive agent layer having elasticity. A plurality of solder balls are attached to the tape. By soldering the solder balls to a printed board, a semiconductor device is mounted. In the case where a temperature cycle has been caused, thermal stress occurs between the IC chip and the printed board or between the hangover portion and the printed board because of a difference in coefficient of thermal expansion between the IC chip or the hangover portion and the printed board. However, this thermal stress is absorbed by the elasticity of the adhesive agent layer. As a result, little thermal stress is applied to solder balls. Even if the above described temperature cycle is repeated, therefore, the solder balls are electrically connected to the printed board stably over a long period of time. In addition, the area of the tape is widened by the area of the hangover portions.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: August 6, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Taguchi, Junichi Asada, Jun Omori, Toshikazu Mino, Naohisa Okumura, Hiroshi Shimoe, Toshitsune Iijima, Katsuhiko Oyama