Patents by Inventor Hiroshi Shinya

Hiroshi Shinya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8782918
    Abstract: A heat processing apparatus includes a heating plate configured to heat the substrate; a cover configured to surround a space above the heating plate; an exhaust gas flow forming mechanism configured to exhaust gas inside the cover to form exhaust gas flows within the space above the heating plate; a downflow forming mechanism configured to form downflows uniformly supplied onto an upper surface of the substrate placed on the heating plate; and a control mechanism configured to execute mode switching control between a mode arranged to heat the substrate while forming the downflows by the downflow forming mechanism and a mode arranged to heat the substrate while forming the exhaust gas flows by the exhaust gas flow forming mechanism.
    Type: Grant
    Filed: June 7, 2011
    Date of Patent: July 22, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Shigeki Aoki, Yuichi Sakai, Mitsuo Yamashita, Hiroshi Shinya
  • Patent number: 8192796
    Abstract: In the present invention, a holding table incorporating a heater is provided, for example, in a treatment container of a planarization unit. A pressing plate having a lower surface formed flat is disposed above the holding table. The pressing plate is movable in the vertical direction and can lower to the holding table to press a resist film on the substrate from above. The pressing plate intermittently presses the upper surface of the resist film to planarize the upper surface while the heater is heating the substrate on the holding table at a predetermined temperature to dry the resist film. According to the present invention, a coating film applied on the substrate can be sufficiently planarized and dried.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: June 5, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Shouichi Terada, Tsuyoshi Mizuno, Yukihiro Wakamoto
  • Publication number: 20110236845
    Abstract: A heat processing apparatus includes a heating plate configured to heat the substrate; a cover configured to surround a space above the heating plate; an exhaust gas flow forming mechanism configured to exhaust gas inside the cover to form exhaust gas flows within the space above the heating plate; a downflow forming mechanism configured to form downflows uniformly supplied onto an upper surface of the substrate placed on the heating plate; and a control mechanism configured to execute mode switching control between a mode arranged to heat the substrate while forming the downflows by the downflow forming mechanism and a mode arranged to heat the substrate while forming the exhaust gas flows by the exhaust gas flow forming mechanism.
    Type: Application
    Filed: June 7, 2011
    Publication date: September 29, 2011
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeki AOKI, Yuichi Sakai, Mitsuo Yamashita, Hiroshi Shinya
  • Publication number: 20110189400
    Abstract: Disclosed is a substrate processing apparatus for forming a coating film on a substrate, which includes; a nozzle having a slit-shaped ejection port for ejecting a coating solution onto the substrate, the ejection port being elongated in a width direction of the substrate; a relative movement mechanism configured to cause relative movement between the nozzle and the substrate to allow the substrate to be relatively scanned by the nozzle; and a first gas flow generating unit configured to generate a gas flow of an inert gas that flows, uniformly along a direction of the relative movement, at least within a zone on one side of the nozzle above an area of the substrate having been scanned by the nozzle.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 4, 2011
    Applicant: Tokyo Electron Limited
    Inventor: Hiroshi Shinya
  • Patent number: 7980003
    Abstract: A heat processing apparatus includes a heating plate configured to heat the substrate; a cover configured to surround a space above the heating plate; an exhaust gas flow forming mechanism configured to exhaust gas inside the cover to form exhaust gas flows within the space above the heating plate; a downflow forming mechanism configured to form downflows uniformly supplied onto an upper surface of the substrate placed on the heating plate; and a control mechanism configured to execute mode switching control between a mode arranged to heat the substrate while forming the downflows by the downflow forming mechanism and a mode arranged to heat the substrate while forming the exhaust gas flows by the exhaust gas flow forming mechanism.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: July 19, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Shigeki Aoki, Yuichi Sakai, Mitsuo Yamashita, Hiroshi Shinya
  • Publication number: 20100221436
    Abstract: In the present invention, a holding table incorporating a heater is provided, for example, in a treatment container of a planarization unit. A pressing plate having a lower surface formed flat is disposed above the holding table. The pressing plate is movable in the vertical direction and can lower to the holding table to press a resist film on the substrate from above. The pressing plate intermittently presses the upper surface of the resist film to planarize the upper surface while the heater is heating the substrate on the holding table at a predetermined temperature to dry the resist film. According to the present invention, a coating film applied on the substrate can be sufficiently planarized and dried.
    Type: Application
    Filed: May 18, 2010
    Publication date: September 2, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Shouichi Terada, Tsuyoshi Mizuno, Yukihiro Wakamoto
  • Patent number: 7757626
    Abstract: In the present invention, a holding table incorporating a heater is provided, for example, in a treatment container of a planarization unit. A pressing plate having a lower surface formed flat is disposed above the holding table. The pressing plate is movable in the vertical direction and can lower to the holding table to press a resist film on the substrate from above. The pressing plate intermittently presses the upper surface of the resist film to planarize the upper surface while the heater is heating the substrate on the holding table at a predetermined temperature to dry the resist film. According to the present invention, a coating film applied on the substrate can be sufficiently planarized and dried.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: July 20, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Shouichi Terada, Tsuyoshi Mizuno, Yukihiro Wakamoto
  • Patent number: 7385849
    Abstract: A semiconductor integrated circuit device is disclosed. The device includes a memory cell array, an I/O buffer, a read/write buffer, an error checking and correcting circuit, and an initialization checking circuit. N-bit data is input to the I/O buffer and the I/O buffer outputs N-bit data. The I/O buffer inputs N-bit data to the read/write buffer, and the read/write buffer outputs N-bit data to the I/O buffer. The memory cell array inputs up to M×N-bit data to the read/write buffer, and the read/write buffer outputs up to M×N-bit data to the memory cell array. The read/write buffer writes a variable number of bits to the memory cell array (N is a natural number equal to or larger than 1, and M is a natural number equal to or larger than 2).
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: June 10, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Koga, Hiroshi Shinya
  • Patent number: 7266759
    Abstract: A semiconductor integrated circuit device includes a memory cell array, an error checking and correcting (ECC) circuit which performs an error checking and correcting operation for readout data read out from the normal data storing portion at data readout time during read latency and an I/O buffer. The memory cell array includes a normal data storing portion and a parity data storing portion. The normal data storing portion stores data for use in a normal data write and a normal data read. The parity data storing portion stores parity data for use in error checking and correcting. The EEC circuit carries out error checking and correcting read data read out from the normal data storing portion, during read latency cycle at a data read operation. The I/O buffer outputs the read data error checked and corrected by the ECC circuit, after the read latency cycle has lapsed.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: September 4, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Koga, Hiroshi Shinya
  • Publication number: 20070169373
    Abstract: A heat processing apparatus includes a heating plate configured to heat the substrate; a cover configured to surround a space above the heating plate; an exhaust gas flow forming mechanism configured to exhaust gas inside the cover to form exhaust gas flows within the space above the heating plate; a downflow forming mechanism configured to form downflows uniformly supplied onto an upper surface of the substrate placed on the heating plate; and a control mechanism configured to execute mode switching control between a mode arranged to heat the substrate while forming the downflows by the downflow forming mechanism and a mode arranged to heat the substrate while forming the exhaust gas flows by the exhaust gas flow forming mechanism.
    Type: Application
    Filed: January 18, 2007
    Publication date: July 26, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeki Aoki, Yuichi Sakai, Mitsuo Yamashita, Hiroshi Shinya
  • Publication number: 20070137556
    Abstract: A thermal processing apparatus has a discharger for discharging process gas from a processing chamber and a ceiling plate provided between the substrate and the discharger. The ceiling plate has apertures at different aperture ratios in accordance with distances from the center of the ceiling plate. The apparatus may have dischargers provided over concentric circles of the substrate and adjusters for adjusting a discharging amount of the corresponding discharger. The apparatus may have gas suppliers provided over the concentric circles of the substrate and adjusters each for adjusting a supply amount of the corresponding supplier.
    Type: Application
    Filed: September 25, 2006
    Publication date: June 21, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Patent number: 7223945
    Abstract: With respect to a substrate on which a resist solution is applied, the inplane uniformity of the quality of a resist film is improved in a heating processing carried out before exposure, and the yields of products are improved. A substrate on which a resist solution is applied is mounted on a heating plate in a processing vessel. Then, a purge gas is supplied into the processing vessel, and heating is started. Above the mounting position of the substrate, a thickness detecting sensor for monitoring the thickness of the resist film formed on the surface of the substrate is provided. When the thickness becomes a predetermined value or less, a control part cause a lift pin to upwardly move so as to increase the distance between the substrate and the heating plate. Thus, the heating value applied to the substrate decreases, and thereafter, only the solvent is volatilized without having a bad influence on a polymer in the resist film.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: May 29, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Publication number: 20070067699
    Abstract: A semiconductor integrated circuit device is disclosed. The device includes a memory cell array, an I/O buffer, a read/write buffer, an error checking and correcting circuit, and an initialization checking circuit. N-bit data is input to the I/O buffer and the I/O buffer outputs N-bit data. The I/O buffer inputs N-bit data to the read/write buffer, and the read/write buffer outputs N-bit data to the I/O buffer. The memory cell array inputs up to M×N-bit data to the read/write buffer, and the read/write buffer outputs up to M×N-bit data to the memory cell array. The read/write buffer writes a variable number of bits to the memory cell array (N is a natural number equal to or larger than 1, and M is a natural number equal to or larger than 2).
    Type: Application
    Filed: August 30, 2006
    Publication date: March 22, 2007
    Inventors: Mitsuhiro Koga, Hiroshi Shinya
  • Publication number: 20070048449
    Abstract: In the present invention, a holding table incorporating a heater is provided, for example, in a treatment container of a planarization unit. A pressing plate having a lower surface formed flat is disposed above the holding table. The pressing plate is movable in the vertical direction and can lower to the holding table to press a resist film on the substrate from above. The pressing plate intermittently presses the upper surface of the resist film to planarize the upper surface while the heater is heating the substrate on the holding table at a predetermined temperature to dry the resist film. According to the present invention, a coating film applied on the substrate can be sufficiently planarized and dried.
    Type: Application
    Filed: August 16, 2006
    Publication date: March 1, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Shouichi Terada, Tsuyoshi Mizuno, Yukihiro Wakamoto
  • Publication number: 20060127593
    Abstract: With respect to a substrate on which a resist solution is applied, the inplane uniformity of the quality of a resist film is improved in a heating processing carried out before exposure, and the yields of products are improved. A substrate on which a resist solution is applied is mounted on a heating plate in a processing vessel. Then, a purge gas is supplied into the processing vessel, and heating is started. Above the mounting position of the substrate, a thickness detecting sensor for monitoring the thickness of the resist film formed on the surface of the substrate is provided. When the thickness becomes a predetermined value or less, a control part cause a lift pin to upwardly move so as to increase the distance between the substrate and the heating plate. Thus, the heating value applied to the substrate decreases, and thereafter, only the solvent is volatilized without having a bad influence on a polymer in the resist film.
    Type: Application
    Filed: February 13, 2006
    Publication date: June 15, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Patent number: 7060939
    Abstract: A substrate on which a resist solution is applied is mounted on a heating plate in a processing vessel. Then, a purge gas is supplied into the processing vessel, and heating is started. Above the mounting position of the substrate, a thickness detecting sensor for monitoring the thickness of the resist film formed on the surface of the substrate is provided. When the thickness becomes a predetermined value or less, a control part causes a lift pin to upwardly move so as to increase the distance between the substrate and the heating plate. Thus, the heating value applied to the substrate decreases, and thereafter, only the solvent is volatilized without having a bad influence on a polymer in the resist film.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: June 13, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Takahiro Kitano
  • Patent number: 7050710
    Abstract: A heat treatment apparatus configured to perform heat treatment on a wafer having a surface on which a coating film is formed, and includes: a holding member for holding the wafer almost horizontally; a chamber for housing the wafer held by the holding member; a hot plate having gas permeability and disposed above the wafer held by the holding member in the chamber so that the coating film formed on the wafer can be directly heated; and an exhaust port provided on the top face of the chamber and exhausting gas in the chamber. Gas generated from the coating film passes through the hot plate and is exhausted from the chamber. Accordingly, uniformity of a coating film is improved. As a result, CD uniformity may be improved, LER characteristics may be improved, and a smooth pattern side face may be obtained.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: May 23, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Hiroshi Shinya, Yasutaka Souma, Takahiro Kitano
  • Patent number: 7024798
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: April 11, 2006
    Assignee: Toyota Electron Limited
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Patent number: 6986214
    Abstract: A low-pressure dryer dries a substrate applied a coating solution thereon at low pressure. The dryer includes an airtight chamber installing a substrate table to place the substrate thereon; a diffuser plate, provided as facing the substrate placed on the substrate table with a gap, for discharging gas existing in the gap toward outside, the diffuser plate having a size almost the same as or larger than the substrate; a substrate-temperature adjuster, installed in the substrate table, for adjusting a temperature of the substrate; and a decompression mechanism for decompressing the airtight chamber. The diffuser plate has a temperature adjuster for making temperature adjustments to have a temperature difference between a first region and a second region of the diffuser plate, the first region facing a center region of the substrate, the second region being outside the first region and including a region facing an outer region of the substrate.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: January 17, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Tomohide Minami, Hiroshi Shinya, Takahiro Kitano
  • Patent number: 6957378
    Abstract: A semiconductor memory device is disclosed which comprises a cell array including a normal data section used for normal data write and read and a parity data section used for check data write and read, the check data being for execution of error check of data as read out of the normal data section, a data buffer for temporal stage of read data from the cell array and write data into the cell array, and an ECC circuit for generating the check data to be stored in the parity data section from write data as input during data writing, and for performing error check and correction of data read out of the normal section based on the data read out of the normal data section and the check data read out of said parity data section during data reading. N-bit parallel data transfer is performed between the data buffer and normal data section whereas m-bit parallel data transfer is done between the data buffer and external input/output terminals (where m and n are integers satisfying m<n).
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: October 18, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Koga, Munehiro Yoshida, Hiroshi Shinya