Patents by Inventor Hiroshi Sogou

Hiroshi Sogou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8154204
    Abstract: A plasma display panel includes a front plate having a dielectric layer covering a display electrode formed on a substrate and a protective layer formed on the dielectric layer, and a rear plate facing the front plate so as to form a discharge space. The plasma display panel also includes an address electrode in a direction crossing the display electrode, barrier ribs for partitioning the discharge space, and phosphor layers. The protective layer is constructed by forming a ground film on the dielectric layer and adhering agglomerated particles to the ground film. The agglomerated particles are produced by coagulating a plurality of crystal particles made of metal oxide.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: April 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Kaname Mizokami, Hiroshi Sogou, Shigeyuki Okumura
  • Patent number: 8022628
    Abstract: A plasma display panel has a front substrate including a plurality of display electrode pairs, a dielectric layer, and a protective layer, and a rear substrate including a plurality of data electrodes, a barrier rib, and a phosphor layer. The front substrate and rear substrate face each other so that the display electrode pairs and the data electrodes intersect, and a hydrogen-absorbing material containing palladium is disposed inside the plasma display panel.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: September 20, 2011
    Assignee: Panasonic Corporation
    Inventors: Hiroshi Sogou, Shigeyuki Okumura
  • Publication number: 20110204775
    Abstract: The plasma display panel has a front plate that has a dielectric layer for covering a display electrode formed on a substrate and a protective layer formed on the dielectric layer, and a rear plate that is faced to the front plate so as to form discharge space, and has an address electrode in the direction crossing the display electrode, barrier ribs for partitioning the discharge space, and phosphor layers. The protective layer is formed by forming a ground film on the dielectric layer and sticking a agglomerated particle to the ground film. Here, the agglomerated particle is produced by coagulating a plurality of crystal particles made of metal oxide.
    Type: Application
    Filed: April 20, 2009
    Publication date: August 25, 2011
    Inventors: Kaname Mizokami, Hiroshi Sogou, Shigeyuki Okumura
  • Publication number: 20100176710
    Abstract: A plasma display panel has a front substrate including a plurality of display electrode pairs, a dielectric layer, and a protective layer, and a rear substrate including a plurality of data electrodes, a barrier rib, and a phosphor layer. The front substrate and rear substrate are faced to each other so that the display electrode pairs and the data electrodes intersect, and a hydrogen-absorbing material containing palladium inside is disposed.
    Type: Application
    Filed: November 5, 2008
    Publication date: July 15, 2010
    Inventors: Hiroshi Sogou, Shigeyuki Okumura
  • Publication number: 20040140571
    Abstract: A circuit substrate comprises a terminal electrode having minute dents on its mounting surface, and a conductive adhesive provided on the surface of the terminal electrode. The conductive adhesive comprises conductive particles each having sizes so as to get in the minute dent. Thus, an electrical contact or a bonding area between the circuit substrate and the mounting device is enlarged and then connection reliability in a mount body of an electronic device is improved.
    Type: Application
    Filed: January 7, 2004
    Publication date: July 22, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshihiro Tomura, Hiroshi Sogou
  • Patent number: 6458287
    Abstract: The present invention provides a piezoelectric ceramic composition that is free from lead and has a small grain size, a high coupling coefficient, a high mechanical Q, and a large frequency constant. This composition is characterized by being expressed by a formula of (LixNa1−x−yKy)z−2wMa2wNb1−wMbwO3, wherein 0.03≦x≦0.2, 0≦y≦0.2, 0.98≦z≦1, 0<w≦0.05, Ma indicates at least one element selected from the alkaline-earth metals, and Mb denotes at least one element selected from Bi, Sb, and the rare earth elements.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: October 1, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masamitsu Nishida, Keiichi Takahashi, Kojiro Okuyama, Hiroshi Sogou, Junichi Kato
  • Patent number: 6426017
    Abstract: The piezoelectric ceramic composition of the present invention contains, as a main component, a material having a composition represented by Formula: CaMXBi4−xTi4−X(Nb1−ATaA)XO15, where M is at least one element selected from the group consisting of Ca, Sr, and Ba; 0.0≦A≦1.0; and 0.0≦X≦0.6.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: July 30, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Keiichi Takahashi, Masamitsu Nishida, Hiroshi Sogou
  • Publication number: 20020060306
    Abstract: The present invention provides a piezoelectric ceramic composition that is free from lead and has a small grain size, a high coupling coefficient, a high mechanical Q, and a large frequency constant. This composition is characterized by being expressed by a formula of (LixNa1−x−yKy)z−2wMa2wNb1−2MbwO3, wherein 0.03≦x≦0.2, 0≦y≦0.2, 0.98≦z≦1, 0<w≦0.05, Ma indicates at least one element selected from the alkaline-earth metals, and Mb denotes at least one element selected from Bi, Sb, and the rare earth elements.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 23, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masamitsu Nishida, Keiichi Takahashi, Kojiro Okuyama, Hiroshi Sogou, Junichi Kato
  • Patent number: 6326694
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: December 4, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Publication number: 20010042852
    Abstract: The piezoelectric ceramic composition of the present invention contains, as a main component, a material having a composition represented by Formula: CaMXBi4−xTi4−X(Nb1−ATaA)XO15, where M is at least one element selected from the group consisting of Ca, Sr, and Ba; 0.0≦A≦1.0; and 0.0≦X≦0.6.
    Type: Application
    Filed: February 26, 2001
    Publication date: November 22, 2001
    Inventors: Keiichi Takahashi, Masamitsu Nishida, Hiroshi Sogou
  • Publication number: 20010003610
    Abstract: A connecting member of circuit substrates includes an organic porous base material provided with tackfree films on both sides, through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films. This structure enables inner-via-hole connection and can therefore attain a connecting member of circuit substrates and an electrical connector of high reliability and high quality.
    Type: Application
    Filed: January 26, 2001
    Publication date: June 14, 2001
    Inventors: Seiichi Nakatani, Akihito Hatakeyama, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Publication number: 20010002294
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Application
    Filed: December 21, 2000
    Publication date: May 31, 2001
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 6211487
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: April 3, 2001
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 6154356
    Abstract: A laminated ceramic device formed by laminating ceramics and conductive metals having a conductor section at a part of at least one of its upper and lower surfaces, in which the difference in level between the conductor section and the section other than the conductor section is smaller than the thickness of the conductor section. Consequently, even in the case of arranging the pattern conductors on both the upper and the lower surfaces of the device, a laminated ceramic device can be obtained in which pattern conductors can be arranged with high accuracy at low cost, no special care is required in the case of polishing, and the thickness accuracy and the bond strength of electrodes are high.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: November 28, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kagata, Kouji Kawakita, Tatsuya Inoue, Hiroshi Sogou
  • Patent number: 6108903
    Abstract: A connecting member of circuit substrates includes an organic porous base material provided with tackfree films on both sides, through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films. This structure enables inner-via-hole connection and can therefore attain a connecting member of circuit substrates and an electrical connector of high reliability and high quality. By using a connecting member of circuit substrates including the organic porous base material provided with tackfree films on both sides and through-holes disposed at requested places which are filled with conductive resin compound up to the surface of the tackfree films, it is possible to form a high-multilayer substrate easily from double sided boards or four-layer substrates which can be manufactured rather stably.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: August 29, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Akihito Hatakeyama, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima
  • Patent number: 5972482
    Abstract: A printed circuit board includes an uncured substrate material with closed voids which are disposed with a through-hole. When the through-hole is formed, voids which exist in the substrate material open from inner wall of the through-hole to form a hollow-shaped part. By filling the through-hole and the hollow-shaped part with conductive paste, the adhesion improves by the increased holding effect between the conductive paste and the wall surface of the through-hole.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: October 26, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akihito Hatakeyama, Seiichi Nakatani, Kouji Kawakita, Hiroshi Sogou, Tatsuo Ogawa, Tamao Kojima