Patents by Inventor Hiroshi Suga

Hiroshi Suga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9190145
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: November 17, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 9135990
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: September 15, 2015
    Assignees: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Patent number: 8604458
    Abstract: The present invention is contemplated for providing a resistance switching device having a very small device size of approximately 20 nm×20 nm in its entirety, by taking advantage of a small diameter of a multilayered carbon nanotube or a multilayered carbon nanofiber per se, via a simpler manner that does not require any molecule inclusion step, with an excellent electric conductivity. Provided is a two-terminal resistance switching device, which has multilayered carbon nanofibers or multilayered carbon nanotubes disposed with a nano-scale gap width therebetween.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: December 10, 2013
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Hiroshi Suga, Yasuhisa Naitou, Masayo Horikawa, Tetsuo Shimizu
  • Publication number: 20130170285
    Abstract: In a drive method for a memory element that includes an insulating substrate, a first electrode and a second electrode provided on the insulating substrate, and an inter-electrode gap portion provided between the first electrode and the second electrode and having a gap of the order of nanometers where a phenomenon of a change in resistance value between the first and second electrodes occurs, and that can perform a transition from a predetermined low-resistance state to a predetermined high-resistance state and a transition from the high-resistance state to the low-resistance state, a current pulse is applied to the memory element by a constant current circuit upon the transition from the high-resistance state to the low-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: July 4, 2013
    Applicants: National Institute of Advance Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Publication number: 20130155757
    Abstract: A memory element includes an insulating substrate; a first electrode and a second electrode on the insulating substrate; and an inter-electrode gap portion that causes a change in resistance value between the first and second electrodes. Applied to the memory element from a pulse generating source is a first voltage pulse for shifting from a predetermined low-resistance state to a predetermined high-resistance state, and a second voltage pulse for shifting from the high-resistance state to the low-resistance state through a series-connected resistor, by which current flowing to the memory element after the change to a low resistance value is reduced. When shifting from the high to the low-resistance state, a voltage pulse is applied such that an electrical resistance between the pulse generating source and the memory element becomes higher than the electrical resistance shifting from the low to the high-resistance state.
    Type: Application
    Filed: August 25, 2011
    Publication date: June 20, 2013
    Applicants: National Institute of Advanced Industrial Science and Technology, Funai Electric Co., Ltd., Funai Electric Advanced Applied Technology Research Institute Inc.
    Inventors: Tsuyoshi Takahashi, Yuichiro Masuda, Shigeo Furuta, Touru Sumiya, Masatoshi Ono, Yutaka Hayashi, Toshimi Fukuoka, Tetsuo Shimizu, Kumaragurubaran Somu, Hiroshi Suga, Yasuhisa Naitou
  • Publication number: 20100193757
    Abstract: The present invention is contemplated for providing a resistance switching device having a very small device size of approximately 20 nm×20 nm in its entirety, by taking advantage of a small diameter of a multilayered carbon nanotube or a multilayered carbon nanofiber per se, via a simpler manner that does not require any molecule inclusion step, with an excellent electric conductivity. Provided is a two-terminal resistance switching device, which has multilayered carbon nanofibers or multilayered carbon nanotubes disposed with a nano-scale gap width therebetween.
    Type: Application
    Filed: July 23, 2008
    Publication date: August 5, 2010
    Inventors: Hiroshi Suga, Yasuhisa Naitou, Masayo Horikawa, Tetsuo Shimizu
  • Patent number: 6127210
    Abstract: A simple and convenient method of manufacturing a CMOS TFT semiconductor circuit device wherein a doping layer doped into a first conductivity type without a mask is compensated with a dopant of a second conductivity type having a high density so that the conductivity type of the doping layer of first conductivity type is inverted into the second conductivity type, and further, in order to carry out the inversion of the conductivity type by the compensation easily and reliably, the surface density of the dopant of the doping layer of first conductivity type is reduced prior to compensating with the dopant of second conductivity type.
    Type: Grant
    Filed: October 3, 1996
    Date of Patent: October 3, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Akio Mimura, Hiroshi Suga, Masaichi Nagai, Youmei Shinagawa, Isao Ikuta
  • Patent number: 5789935
    Abstract: A method of evaluating a motor. Prior to testing the motor, the following factors are measured as essential properties of the motor, e.g. a correlation between a reference current and a motor current, reaction of the motor current, etc. in response to a variation of the reference current, a correlation between the reference current and a motor torque, temperature characteristics of the motor torque, a relationship between the torque, the number of rotations, efficiency of the motor, and so on. The measured essential properties include response delays of an evaluator and sensors, and influences of disturbances such as temperature. Data collected during testing are corrected on the basis of the measured essential properties using the reference currents as time criteria such that influences caused by response delays can be excluded. Thus, the performances of the motor can be precisely analyzed.
    Type: Grant
    Filed: July 31, 1995
    Date of Patent: August 4, 1998
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hiroshi Suga, Yasutomo Kawabata
  • Patent number: 5623104
    Abstract: A test motor 2 is controlled by a controller 7 in accordance with travelling pattern (i.e. vehicle speed) data of an electric vehicle. A load motor 3 is controlled by a controller 9 in accordance with a load pattern. A host controller 10 generates the load pattern based on the vehicle speed pattern and factors of the electric vehicle, and synchronously outputs the vehicle speed pattern and the load pattern to the controller 7 and 9, respectively. Data detected by a torque sensor 4 or other measuring element are input to the host controller 10 to generate a two-dimensional map showing the relationship between the motor efficiency and motor output, or between the motor efficiency and revolution speed. Since the load pattern is generated and input in advance without using feedback control, test results can be obtained with high accuracy.
    Type: Grant
    Filed: January 30, 1996
    Date of Patent: April 22, 1997
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventor: Hiroshi Suga
  • Patent number: 5475074
    Abstract: A polymerizable composition containing;(A) 100 parts by weight of a vinylbenzyl compound of the formula (I), ##STR1## wherein each of R.sup.1 and R.sup.2 is independently a halogen atom, each of h and i is independently 0, 1 or 2, each of X.sup.1, X.sup.2 and X.sup.3 is independently an oxygen atom or a sulfur atom, and each of j, k and m is 0 or 1, provided that when k is 0, j is 0, that when m is 0, each of j and k is 0, that when j is 0 and when each of k and m is 1, X.sup.1 and X.sup.2 cannot be sulfur atoms at the same time, and that when each of m, k and j is 1, X.sup.1, X.sup.2 and X.sup.3 cannot be sulfur atoms at the same time,and(B) 0.1 to 20 parts by weight of 2,4-diphenyl-4-methyl-1-pentene.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: December 12, 1995
    Assignee: Tokuyama Corporation
    Inventors: Shingo Matsuoka, Hideki Kazama, Tadashi Hara, Tomonori Matsunaga, Hiroshi Suga
  • Patent number: 3991296
    Abstract: An apparatus for forming grooves in a semiconductor wafer by the use of a laser beam includes a movable stage on which the wafer is mounted and a transparent member mounted on the stage in a sealed manner and covering the wafer. A liquid is introduced into the space defined between the wafer and the transparent member.
    Type: Grant
    Filed: November 12, 1975
    Date of Patent: November 9, 1976
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Yoshitomo Kojima, Hiroshi Suga