Abstract: The present invention provides a tablet for treating postherpetic neuralgia and a method of treating postherpetic neuralgia with the use of the tablet. The therapeutic tablet for postherpetic neuralgia according to the present invention is characterized in comprising buprenorphine hydrochloride, having a double layer structure consisting of a quick-release layer and a sustained-release layer, wherein the tablet is adhesive to the oral mucosa.

Abstract: A circuit having a plurality of driver IC's 101-1 to 101-n provided corresponding to divided areas of a display panel 102, each driver having an output circuit for outputting a supplied reference current IREF as a drive current to corresponding divided areas DRVA1 to DRVAn of the display panel 102 and reference current source circuits 200-1 to 200-n for sampling and holding the reference current input from the reference current input terminal, then supplying the same to the output circuit, the reference current input terminal being connected to the reference current input terminal of another driver by a common current interconnect CML1, and the reference current being distributed to the reference current source circuits of drivers by time division.

Abstract: The present invention relates to polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics containing in themselves an organic pigment having heat resistance as high as a thermal decomposition temperature of 200° C. or higher, and soluble in a mineral acid and having group(s) of —N? and/or NH— in the molecule, such as any of perinones and/or perylenes, any of phthalocyanines, any of quinacridones, and any of dioxazines, wherein they have a strength retention of 50% or higher when exposed to light from a xenon lamp for 100 hours and having a tensile strength retention of 85% or higher after exposed to an atmosphere of a temperature of 80° C. and a relative humidity of 80% for 700 hours. The polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics can be used for cords for reinforcing rubber, sheets and rods for reinforcing cement/concrete, composite materials, sail clothes, ropes, knife proof vests and bullet proof vests.

Abstract: An object of the present invention is to obtain a novel polymeric material capable of forming a solid polymer electrolyte excellent not only in processability, solvent resistance and durability/stability but also in ion conductivity by introducing sulfonic acid group or phosphonic acid group into a polybenzazole compound having excellent properties in view of heat resistance, solvent resistance, mechanical characteristics and the like. Means attaining the object of the present invention is a polybenzazole compound including an aromatic dicarboxylic acid bond unit having sulfonic acid group and/or phosphonic acid group and satisfying either a condition that inherent viscosity measured in concentrated sulfuric acid is in the range of 0.25 to 10 dl/g or a condition that inherent viscosity measured in a methanesulfonic acid solution is in the range of 0.1 to 50 dl/g.

Abstract: The present invention relates to polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics containing in themselves an organic pigment having heat resistance as high as a thermal decomposition temperature of 200° C. or higher, and soluble in a mineral acid and having group(s) of —N=and/or NH— in the molecule, such as any of perinones and/or perylenes, any of phthalocyanines, any of quinacridones, and any of dioxazines, wherein they have a strength retention of 50% or higher when exposed to light from a xenon lamp for 100 hours and having a tensile strength retention of 85% or higher after exposed to an atmosphere of a temperature of 80° C. and a relative humidity of 80% for 700 hours. The polybenzazole fibers or filaments, staple fibers, spun yarns, and woven or knitted fabrics can be used for cords for reinforcing rubber, sheets and rods for reinforcing cement/concrete, composite materials, sail clothes, ropes, knife proof vests and bullet proof vests.

Abstract: A circuit having a plurality of driver IC's 101-1 to 101-n provided corresponding to divided areas of a display panel 102, each driver having an output circuit for outputting a supplied reference current IREF as a drive current to corresponding divided areas DRVA1 to DRVAn of the display panel 102 and reference current source circuits 200-1 to 200-n for sampling and holding the reference current input from the reference current input terminal, then supplying the same to the output circuit, the reference current input terminal being connected to the reference current input terminal of another driver by a common current interconnect CML1, and the reference current being distributed to the reference current source circuits of drivers by time division.

Abstract: A PLL circuit and a DLL circuit able to stabilize a control voltage within a short time after a phase pull-in operation in each cycle of a reference clock. In a phase comparator, the size of a leading phase or a delayed phase of a feedback signal is detected with respect to a reference clock signa, and pulse signals having pulse widths corresponding to the size are output. A current corresponding to the signals is output from a charge pump circuit to a lag-lead filter, and a control voltage obtained by removing noise of the above output is output from a low-pass filter to a voltage-controlled oscillator. Furthermore, through capacitors, pulse signals are superposed on the control voltage, and a sharp waveform is obtained by correcting blunting of the waveform by the low-pass filter. Due to this, the control voltage is stabilized within a short time after a phase pull-in operation in each cycle of the reference clock signal.

Abstract: An object of the present invention is to obtain a novel polymeric material capable of forming a solid polymer electrolyte excellent not only in processability, solvent resistance and durability/stability but also in ion conductivity by introducing sulfonic acid group or phosphonic acid group into a polybenzazole compound having excellent properties in view of heat resistance, solvent resistance, mechanical characteristics and the like.

Abstract: The present invention provides a reference voltage generator capable of operating stably at a low power source voltage, suppressing the increase of a current consumption and providing a stable reference voltage at a high power source voltage, and reducing a layout area. A pMOS transistor, a resistance element, an nMOS transistor, a resistance element and an nMOS transistor are connected in series between a supply line of a power source voltage and a common potential line.

Abstract: An inverter type delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit capable of realizing simplification of circuit configuration, reduction of an effect of power source noise, and reduction of jitter, wherein a delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit comprised of a plurality of delay stages controlled in drive current in accordance with a bias voltage or a control voltage and determined in delay time by the drive current, adding a change of a power source voltage to the above bias voltage or control voltage by a predetermined ratio and supplying a result of the addition to the above delay stages to suppress the power source voltage dependencies of the delay times of the delay stages, or connecting by a predetermined ratio a plurality of delay stages having different power source voltage dependencies, for example, power source voltage dependencies of opposite delay times, to suppress the power source voltage dependenci

Abstract: The present invention provides a reference voltage generator capable of operating stably at a low power source voltage, suppressing the increase of a current consumption and providing a stable reference voltage at a high power source voltage, and reducing a layout area. A pMOS transistor, a resistance element, an nMOS transistor, a resistance element and an nMOS transistor are connected in series between a supply line of a power source voltage and a common potential line.

Abstract: A multi-input differential amplifier circuit capable of maintaining the linear characteristic of the input voltage and the output voltage and capable of enhancing the dynamic range and the linear characteristic. A multi-input differential amplifier circuit configured by forming differential pairs by transistors MI0i, MI1i, (i=1, 2, . . .

Abstract: A PLL circuit and a DLL circuit able to stabilize a control voltage within a short time after a phase pull-in operation in each cycle of a reference clock. In a phase comparator, the size of a leading phase or a delayed phase of a feedback signal is detected with respect to a reference clock signa, and pulse signals having pulse widths corresponding to the size are output. A current corresponding to the signals is output from a charge pump circuit to a lag-lead filter, and a control voltage obtained by removing noise of the above output is output from a low-pass filter to a voltage-controlled oscillator. Furthermore, through capacitors, pulse signals are superposed on the control voltage, and a sharp waveform is obtained by correcting blunting of the waveform by the low-pass filter. Due to this, the control voltage is stabilized within a short time after a phase pull-in operation in each cycle of the reference clock signal.

Abstract: An inverter type delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit capable of realizing simplification of circuit configuration, reduction of an effect of power source noise, and reduction of jitter, wherein a delay circuit, voltage-controlled oscillation circuit, and voltage-controlled delay circuit comprised of a plurality of delay stages controlled in drive current in accordance with a bias voltage or a control voltage and determined in delay time by the drive current, adding a change of a power source voltage to the above bias voltage or control voltage by a predetermined ratio and supplying a result of the addition to the above delay stages to suppress the power source voltage dependencies of the delay times of the delay stages, or connecting by a predetermined ratio a plurality of delay stages having different power source voltage dependencies, for example, power source voltage dependencies of opposite delay times, to suppress the power source voltage dependenci

Abstract: A semiconductor integrated circuit device has an address decoder which is constructed of a plurality of MOSFETs implemented in a switch tree. The switch tree includes first and second switch tree portions which are controlled `on` and `off` by the same input signals. A first switch branch in the first switch tree portion, which is constructed of a comparatively small number of MOSFETs, and a second switch branch in the second switch tree portion, which is constructed of a comparatively large number of MOSFETs, are controlled `one` and `off` by the same input signal, while a second switch branch in the first switch tree portion, which is constructed of a comparatively large number of MOSFETs, and a first switch branch in the second switch tree portion, which is constructed of a comparatively small number of MOSFETs, are controlled `on` and `off` by the same input signal.