Patents by Inventor Hiroshi Tateno

Hiroshi Tateno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149389
    Abstract: A polishing pad including a polyurethane sheet as a polishing layer, wherein the polyurethane sheet has a ratio (E?B40/E?T40) of a storage elastic modulus E?B40 at 40° C. in dynamic viscoelasticity measurement performed under a bending mode condition with a frequency of 1.6 Hz to a storage elastic modulus E?T40 at 40° C. in dynamic viscoelasticity measurement performed under a tension mode condition with a frequency of 1.6 Hz of 0.60 to 1.60.
    Type: Application
    Filed: March 22, 2021
    Publication date: May 9, 2024
    Inventors: Teppei TATENO, Ryuma MATSUOKA, Hiroshi KURIHARA, Satsuki YAMAGUCHI, Yamato TAKAMIZAWA
  • Publication number: 20240149390
    Abstract: Provided is a polishing pad comprising a polishing layer made of a polyurethane resin foam containing an isocyanate-terminated prepolymer, and a curing agent, wherein the ratio (NC80/NC40) of a weight proportion (NC80) of an amorphous phase content in the polishing layer measured at 80° C. by a pulsed NMR method to a weight proportion (NC40) of the amorphous phase content in the polishing layer measured at 40° C. by the pulsed NMR method is between 1.5 and 2.5.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 9, 2024
    Applicant: FUJIBO HOLDINGS, INC.
    Inventors: Yoshihide KAWAMURA, Teppei TATENO, Hiroshi KURIHARA, Satsuki YAMAGUCHI, Yamato TAKAMIZAWA, Keisuke OCHI, Tetsuaki KAWASAKI
  • Publication number: 20240139903
    Abstract: A polishing pad comprising a polishing layer that has a polishing surface for performing a polishing process on an item to be polished, wherein the polishing layer includes hollow microspheres that form hollow bodies within the polishing layer, a cross-section of the polishing layer has an average pore diameter of 10-14 ?m, and in a histogram of pore diameters in a cross-section of the polishing layer where the bin width is 1 ?m, the sum of pores that are 25 ?m or greater is 5% or less with respect to the total number of pores in the cross-section, and the sum of the areas of the pores in each bin that is 25 ?m or greater is 20% or less with respect to the total area of the pores in the cross-section.
    Type: Application
    Filed: March 23, 2022
    Publication date: May 2, 2024
    Applicant: FUJIBO HOLDINGS, INC.
    Inventors: Teppei TATENO, Hiroshi KURIHARA, Satsuki YAMAGUCHI, Yamato TAKAMIZAWA
  • Publication number: 20240131653
    Abstract: This polishing pad has a polishing layer that comprises a polyurethane resin foam derived from an isocyanate-terminated prepolymer and a curing agent, wherein: the distance between hard segments in the polishing layer as measured by small-angle X-ray scattering is 9.5 nm or less; or the ratio (NC80/CC80) of the content proportion by weight (NC80) of an amorphous phase in the polishing layer as measured by pulse NMR at 80° C. to the content proportion by weight (CC80) of a crystalline phase in the polishing layer as measured by pulse NMR at 80° C. is 2.6-3.1, and the ratio (NC40/CC40) of the content proportion by weight (NC40) of an amorphous phase in the polishing layer as measured by pulse NMR at 40° C. to the content proportion by weight (CC40) of a crystalline phase in the polishing layer as measured by pulse NMR at 40° C. is 0.5-0.9.
    Type: Application
    Filed: March 28, 2022
    Publication date: April 25, 2024
    Applicant: FUJIBO HOLDINGS, INC.
    Inventors: Teppei TATENO, Hiroshi KURIHARA, Satsuki YAMAGUCHI, Yamato TAKAMIZAWA, Keisuke OCHI, Tetsuaki KAWASAKI
  • Patent number: 11486800
    Abstract: A sample dispersing device contains a container inside of which a dispersal chamber where a power sample is dispersed is formed, and an introducing mechanism that introduces a gas containing the powder sample from the outside of the container into the dispersal chamber based on a pressure difference between the inside and the outside of the container. The introducing mechanism contains an introduction pipe where the gas containing the powder sample flows, and several restrictors arranged in the introduction pipe.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: November 1, 2022
    Assignee: HORIBA, LTD.
    Inventors: Makoto Nagura, Kazuma Aoyagi, Akihiro Minami, Hiroshi Tateno, Tomoya Shimizu, Kusuo Ueno
  • Publication number: 20210088423
    Abstract: A sample dispersing device contains a container inside of which a dispersal chamber where a power sample is dispersed is formed, and an introducing mechanism that introduces a gas containing the powder sample from the outside of the container into the dispersal chamber based on a pressure difference between the inside and the outside of the container. The introducing mechanism contains an introduction pipe where the gas containing the powder sample flows, and several restrictors arranged in the introduction pipe.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 25, 2021
    Inventors: Makoto NAGURA, Kazuma AOYAGI, Akihiro MINAMI, Hiroshi TATENO, Tomoya SHIMIZU, Kusuo UENO
  • Patent number: 8766208
    Abstract: A scintillator 21 is disposed on an incidence side 23a of a photomultiplier 23. A scintillator cap 22 for introducing electrons into the scintillator 21 is disposed around the scintillator 21. The photomultiplier 23 is disposed in a sample chamber 17 with a vacuum seal formed around the photomultiplier 23. An insulating member 25 made of an opaque material is disposed between the scintillator cap 22 and the photomultiplier 23. The insulating member 25 provides insulation between the scintillator cap 22 and the photomultiplier 23. The lateral circumference of the photomultiplier 23 is covered to prevent light from entering the photomultiplier 23. A band filter 27 for blocking the illumination light of an optical microscope 30 is disposed between the scintillator 21 and the incidence side 23a of the photomultiplier 23 to make it possible to conduct simultaneous observations by using the electrons and the optical microscope.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: July 1, 2014
    Assignee: Horiba, Ltd.
    Inventor: Hiroshi Tateno
  • Publication number: 20120161000
    Abstract: A scintillator 21 is disposed on an incidence side 23a of a photomultiplier 23. A scintillator cap 22 for introducing electrons into the scintillator 21 is disposed around the scintillator 21. The photomultiplier 23 is disposed in a sample chamber 17 with a vacuum seal formed around the photomultiplier 23. An insulating member 25 made of an opaque material is disposed between the scintillator cap 22 and the photomultiplier 23. The insulating member 25 provides insulation between the scintillator cap 22 and the photomultiplier 23. The lateral circumference of the photomultiplier 23 is covered to prevent light from entering the photomultiplier 23. A band filter 27 for blocking the illumination light of an optical microscope 30 is disposed between the scintillator 21 and the incidence side 23a of the photomultiplier 23 to make it possible to conduct simultaneous observations by using the electrons and the optical microscope.
    Type: Application
    Filed: December 23, 2011
    Publication date: June 28, 2012
    Inventor: Hiroshi TATENO
  • Patent number: 4589001
    Abstract: A quasiparticle control device including a Josephson junction element formed of a pair of superconductors joined to each other, with a weak link part intervening therebetween, and a third electrode provide on the weak link part. The characteristics of the Josephson junction of the Josephson junction element is controlled by injecting quasiparticles to the third electrode.
    Type: Grant
    Filed: April 26, 1984
    Date of Patent: May 13, 1986
    Assignees: Agency of Industrial Science & Technology, Ministry of International Trade & Industry
    Inventors: Shigeki Sakai, Hiroshi Tateno, Shoei Kataoka
  • Patent number: 4182964
    Abstract: Occurrence of high field domain in the conventional Gunn diode is prevented by covering a solid body such as a semiconductor element partially or wholly by a dielectric member or by a control element such as a metallic layer coupled reactively with the solid body through a dielectric member, whereby a solid state element having a negative differential conductivity is obtained. Such a type of negative-resistance solid state element, together with its various modes of embodimental construction disclosed herein, affords a superior solid state element which is applicable to amplifiers, oscillators, logic memories, and the like of millimeter or submillimeter bands.
    Type: Grant
    Filed: July 20, 1972
    Date of Patent: January 8, 1980
    Assignee: Kogyo Gijutsuin
    Inventors: Shoei Kataoka, Hiroshi Tateno, Hiroyuki Fujisada, Hideo Yamada, Mitsuo Kawashima, Yasuo Komamiya
  • Patent number: 4137569
    Abstract: In a high electric field domain device composed of a plurality of circuit elements each provided with a high electric field domain-generating electrode and a high electric field domain-suppressing electrode, logic operations can be performed by preparatorily applying affirmative signals and their corresponding negative signals to the suppressing electrodes of the individual circuit elements and subsequently applying pulse-coded signals of affirmations and negations to the generating electrodes of the circuit elements which have had the affirmative and corresponding negative signals applied in advance thereto.
    Type: Grant
    Filed: March 30, 1977
    Date of Patent: January 30, 1979
    Assignee: Agency of Industrial Science & Technology
    Inventors: Yasuo Komamiya, Hiroshi Tateno, Shoei Kataoka, Morisue Mititada
  • Patent number: 4090155
    Abstract: A transmission line is disclosed which comprises a conductive layer, a resistive semiconductor layer disposed on the conductive layer and a blocking electrode disposed on the resistive semiconductor layer. By applying a biasing voltage between the blocking electrode and the conductive layer, a depletion layer is produced in the resistive semiconductor layer, the depletion layer formed in the semiconductor layer being used as a medium for transmission of electromagnetic wave.
    Type: Grant
    Filed: March 22, 1976
    Date of Patent: May 16, 1978
    Assignee: Agency of Industrial Science & Technology
    Inventors: Hiroshi Tateno, Shoei Kataoka, Nobuo Hashizume, Yasuo Komamiya
  • Patent number: 4023196
    Abstract: An improved negative resistance element is disclosed, the element being composed of a semiconductor element and having an effective negative electroconductivity in a high electric field, the element being constructed so that the sectional area of the region near the anode is made larger than the sectional area of the other regions of the element, whereby the distribution of the high electric field in the interior of the element is made uniform along the element, that is, from the region near the anode toward the region near the cathode to thereby broaden the region having an effective negative resistance. Furthermore, and in an alternative embodiment, there is disclosed a negative resistance element in whch the region near the cathode besides the region near the anode is also made to have a larger sectional area than the other regions of the element.
    Type: Grant
    Filed: August 25, 1969
    Date of Patent: May 10, 1977
    Assignee: Kogyo Gijutsuin
    Inventors: Shoei Kataoka, Hiroshi Tateno