Abstract: A common-mode choke coil includes a multilayer body, and first and second coils incorporated in the multilayer body. The multilayer body is a cuboid shape including plural stacked non-conductor layers. The first coil includes a first coil conductor. The second coil includes a second coil conductor. With the common-mode choke coil, in a frequency region greater than or equal to 0.1 GHz and less than or equal to 100 GHz (i.e., from 0.1 GHz to 100 GHz), the Sdd21 transmission characteristic is less than or equal to ?3 dB at or above 30 GHz, and in a frequency region greater than or equal to 10 GHz and less than or equal to 60 GHz (i.e., from 10 GHz to 60 GHz), the Scc21 transmission characteristic is minimum at or above 20 GHz, and the Scc21 transmission characteristic has a minimum value of less than or equal to ?20 dB.

Abstract: A common-mode choke coil includes a multilayer body, and first and second coils incorporated in the multilayer body. The multilayer body is a cuboid shape including plural stacked non-conductor layers. The first coil includes a first coil conductor. The second coil includes a second coil conductor. With the common-mode choke coil, in a frequency region greater than or equal to 0.1 GHz and less than or equal to 100 GHz (i.e., from 0.1 GHz to 100 GHz), the Sdd21 transmission characteristic is less than or equal to ?3 dB at or above 30 GHz, and in a frequency region greater than or equal to 10 GHz and less than or equal to 60 GHz (i.e., from 10 GHz to 60 GHz), the Scc21 transmission characteristic is minimum at or above 20 GHz, and the Scc21 transmission characteristic has a minimum value of less than or equal to ?20 dB.

Abstract: A semiconductor device includes a first regulator electrically connected to a first power supply line, a second regulator electrically connected to a second power supply line, a control circuit configured to control the first and second regulators, and at least two functional circuit modules electrically connectable to the first power supply line and the second power supply line. When all the functional circuit modules are set to a power-on state (active mode), the control circuit controls the first regulator to output a voltage to the first power supply line and the second regulator to output a voltage to the second power supply line, and when some functional circuit modules are set to a power-off state (standby mode), the control circuit controls the first regulator to output a voltage to the first power supply line and the second regulator not to output a voltage to the second power supply line.

Abstract: A laminated coil component includes a multilayer body in which a coil, which is obtained by electrically connecting a plurality of coil conductors with a via conductor interposed therebetween, is provided in an inside of an insulator portion which is obtained by laminating a plurality of insulation layers. Each of a first coil conductor and a second coil conductor that are adjacent to each other in a lamination direction and are electrically connected in series with a first via conductor interposed therebetween includes a first main surface that faces the opposite direction to the lamination direction and on which a void exists. The second coil conductor includes a second main surface that faces the lamination direction and on which another void exists, and the other void locally exists on a position opposed to the first via conductor.

Abstract: Provided is a curable organopolysiloxane composition for forming a film, which has low viscosity before curing, has excellent mechanical strength and dielectric breakdown strength after curing, and can provide a uniform and thin organopolysiloxane cured film. The curable organopolysiloxane composition comprises: a curing reactive organopolysiloxane, a curing agent, (D1) reinforcing fine particles having a BET specific surface area exceeding 100 m2/g, which have been surface treated with an organic silicon compound, and (D2) reinforcing fine particles having a BET specific surface area within a range of 10 to 100 m2/g, which have been surface treated with an organic silicon compound. The mass ratio of components (D1) and (D2) is within a range of 50:50 to 99:1, and the sum of components (D1) and (D2) is within a range of 10 to 40 mass %. A method of manufacturing an organopolysiloxane cured film using the curable organopolysiloxane composition is also provided.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, a second coil, a first terminal electrode, a second terminal electrode, a third terminal electrode, and a fourth terminal electrode. The multilayer body includes plural non-conductor layers. The first and second coils are incorporated in the multilayer body. The first and second terminal electrodes are connected to the first coil. The third and fourth terminal electrodes are connected to the second coil. The first coil has a path length L1, the second coil has a path length L2, and the sum of the path length L1 and the path length L2 is less than or equal to 3.4 mm. The respective lower-face electrode portions of the terminal electrodes each have an area of less than or equal to 0.034 ?m2.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, a second coil, a first terminal electrode, a second terminal electrode, a third terminal electrode, and a fourth terminal electrode. The multilayer body includes plural non-conductor layers. The first and second coils are incorporated in the multilayer body. The first and second terminal electrodes are connected to the first coil. The third and fourth terminal electrodes are connected to the second coil. The first coil has a path length L1, the second coil has a path length L2, and the sum of the path length L1 and the path length L2 is less than or equal to 3.5 mm The non-conductor layers each have a relative permittivity of less than or equal to 11.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, and a second coil. The multilayer body includes plural non-conductor layers. The first and second coils are incorporated in the multilayer body. The first coil has a path length L1, the second coil has a path length L2, and the sum of the path length L1 and the path length L2 is less than or equal to 3.30 mm. The first coil has a first coil conductor, and the second coil has a second coil conductor. The first coil conductor and the second coil conductor have a spacing D between each other of greater than or equal to 6 ?m and less than or equal to 26 ?m (i.e., from 6 ?m to 26 ?m) in the stacking direction of the non-conductor layers.

Abstract: A coil component includes a device main body composed of an insulator, a coil conductor which is disposed inside or on a surface of the device main body, and an outer electrode which is disposed on a surface of the device main body and electrically connected to the coil conductor. The outer electrode includes a Ag-containing layer containing Ag grains with an average grain size of 4.2 to 15 ?m.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, a second coil, a first terminal electrode, a second terminal electrode, a third terminal electrode, and a fourth terminal electrode. The multilayer body includes plural non-conductor layers. The first and second coils are incorporated in the multilayer body. The first and second terminal electrodes are connected to the first coil. The third and fourth terminal electrodes are connected to the second coil. The first coil has a path length L1, the second coil has a path length L2, and the sum of the path length L1 and the path length L2 is less than or equal to 3.5 mm.

Abstract: A common-mode choke coil includes a multilayer body, and first and second coils incorporated in the multilayer body. The multilayer body is a cuboid shape including plural stacked non-conductor layers. The first coil includes a first coil conductor. The second coil includes a second coil conductor. With the common-mode choke coil, in a frequency region greater than or equal to 0.1 GHz and less than or equal to 100 GHz (i.e., from 0.1 GHz to 100 GHz), the Sdd21 transmission characteristic is less than or equal to ?3 dB at or above 30 GHz, and in a frequency region greater than or equal to 10 GHz and less than or equal to 60 GHz (i.e., from 10 GHz to 60 GHz), the Scc21 transmission characteristic is minimum at or above 20 GHz, and the Scc21 transmission characteristic has a minimum value of less than or equal to ?20 dB.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, and a second coil. The multilayer body includes plural stacked non-conductor layers. The first and second coils are incorporated in the multilayer body. The first coil includes a first coil conductor. The second coil includes a second coil conductor disposed along an interface between non-conductor layers different from an interface between non-conductor layers along which the first coil conductor is disposed. With the first coil conductor and the second coil conductor being viewed in plan in the stacking direction of the multilayer body, the first coil conductor and the second coil conductor have no portion where the two coil conductors overlap each other, except for a portion where the two coil conductors cross each other.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, and a second coil. The multilayer body is a cuboid in shape that includes plural stacked non-conductor layers. The first and second coils are incorporated in the multilayer body. The first coil includes a first coil conductor, and the second coil includes a second coil conductor. The first coil conductor is positioned with gaps SG1 to SG4 interposed between the first coil conductor and the outer periphery surface of the multilayer body. The second coil conductor is positioned with gaps SG5 to SG8 interposed between the second coil conductor and the outer periphery surface of the multilayer body. Of the four absolute values of the differences between the gaps SG1 to SG4 and the corresponding gaps SG5 to SG8, at least two absolute values are greater than or equal to 0.02 mm.

Abstract: A common-mode choke coil includes a multilayer body, a first coil, a second coil, a first terminal electrode, a second terminal electrode, a third terminal electrode, and a fourth terminal electrode. The multilayer body includes plural non-conductor layers. The first and second coils are incorporated in the multilayer body. The first and second terminal electrodes are connected to the first coil. The third and fourth terminal electrodes are connected to the second coil. The first coil includes a first coil conductor. The second coil includes a second coil conductor disposed along an interface between non-conductor layers different from an interface between non-conductor layers along which the first coil conductor is disposed. The first and second coil conductors each have a number of turns of less than 2.

Abstract: A coil component includes a device main body composed of an insulator, a coil conductor which is disposed inside or on a surface of the device main body, and an outer electrode which is disposed on a surface of the device main body and electrically connected to the coil conductor. The outer electrode includes a Ag-containing layer containing Ag grains with an average grain size of 4.2 to 15 ?m.

Abstract: An object of the present invention is to provide a semiconductor device and a control method thereof that can suppress a circuit scale from being increased while maintaining a high interruption response performance.

Abstract: A correlation operation circuit includes a first SRAM storing a plurality of pieces of detection pattern data, product-sum operators, a second SRAM storing intermediate data, and a comparator. When time series data is sequentially input, the intermediate data of all correlation functions referring to one time series data in a period during which the one time series data is input. When one time series data is input, the product-sum operator multiplies the detection pattern data sequentially read from the first SRAM by the one input time series data. The corresponding intermediate data is read from the second SRAM in synchronization with the multiplication, and the sequentially-calculated products are cumulatively added to the read intermediate data to be written back into the second SRAM as the intermediate data. As a result, the calculated correlation function data is supplied to the comparator to be compared with a predetermined specified value.

Abstract: An object of the present invention is to provide a semiconductor device and a control method thereof that can suppress a circuit scale from being increased while maintaining a high interruption response performance.

Abstract: A correlation operation circuit includes a first SRAM storing a plurality of pieces of detection pattern data, product-sum operators, a second SRAM storing intermediate data, and a comparator. When time series data is sequentially input, the intermediate data of all correlation functions referring to one time series data in a period during which the one time series data is input. When one time series data is input, the product-sum operator multiplies the detection pattern data sequentially read from the first SRAM by the one input time series data. The corresponding intermediate data is read from the second SRAM in synchronization with the multiplication, and the sequentially-calculated products are cumulatively added to the read intermediate data to be written back into the second SRAM as the intermediate data. As a result, the calculated correlation function data is supplied to the comparator to be compared with a predetermined specified value.

Abstract: According to one embodiment, a semiconductor device includes an operation circuit 20 that calculates an expected value ?? of a new waiting time based on a measured value z of a waiting time of an apparatus to be controlled 15 that varies depending on a timing when an interruption signal is generated and an expected value ? of the waiting time, and a waiting mode control circuit 12 that sets a waiting state when the apparatus to be controlled 15 is waiting to a waiting state in accordance with the expected value ?? of the new waiting time.