Patents by Inventor Hiroshi Uto

Hiroshi Uto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Interleave circuit, de-interleave circuit and xDSL modem
    Publication number: 20020083248
    Abstract: When a frame length N of input data is an even number, a read address generator generates twice in succession an address at which head byte data of each frame of the input data is stored. The head byte data of each frame of the input data is thus read from a memory twice in succession. The data of the frame length (N+1) having the head byte data of each frame inserted as a dummy byte is then written to another memory according to a write address from a write address generator.
    Type: Application
    Filed: December 19, 2001
    Publication date: June 27, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroshi Uto
  • False twisted yarn
    Patent number: 5930989
    Abstract: A false twisted yarn is made from a lyocell multifilament yarn having a crimp shape coefficient defined by CE/N of 0.02-0.20, wherein CE is a crimp extension (%) and N is the number of crimps; a crimp extension of 0.7-7%; and a degree of swelling in water of 70% or less.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: August 3, 1999
    Assignees: Asahi Kasei Kogyo Kabushiki Kaisha, Akzo Nobel Faser AG
    Inventors: Masanori Nakagawa, Hiroshi Uto