Patents by Inventor Hiroshi Yashiro
Hiroshi Yashiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11970162Abstract: Provided is a vehicle control device including: a recognizer that recognizes a surrounding situation of a vehicle, and identifies an interrupting vehicle trying to cut in a lane of the vehicle; a driving controller that controls steering and acceleration/deceleration of the vehicle without depending on an operation of the vehicle by a driver; and a mode determiner that determines a driving mode of the vehicle as one of a plurality of driving modes including a first driving mode and a second driving mode, wherein the second driving mode is a driving mode imposing a lighter task on the driver than the first driving mode, and a part of the plurality of driving modes including at least the second driving mode is controlled by the driving controller, and wherein the mode determiner restricts execution of the second driving mode when a relationship between the vehicle and the interrupting vehicle satisfies a predetermined condition.Type: GrantFiled: December 28, 2020Date of Patent: April 30, 2024Assignee: HONDA MOTOR CO., LTD.Inventors: Hiroshi Oguro, Katsuya Yashiro
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Patent number: 11959677Abstract: A refrigeration apparatus includes: a refrigerant circuit through which refrigerant circulates; a controller to execute a plurality of refrigerant shortage sensing functions of sensing a shortage of an amount of the refrigerant; and an input device through which an operation mode to be set is input into the controller. The operation mode includes: a first mode in which energy-saving performance is emphasized; and a second mode in which the refrigeration apparatus is permitted to operate in a range in which reliability is ensured. In accordance with the operation mode set through the input device, the controller determines which one of sensing results obtained by the refrigerant shortage sensing functions is enabled and which one of sensing results obtained by the refrigerant shortage sensing functions is disabled. When a sensing result determined to be enabled shows a refrigerant shortage, the controller gives a notification about the refrigerant shortage.Type: GrantFiled: April 9, 2019Date of Patent: April 16, 2024Assignee: Mitsubishi Electric CorporationInventors: Takanori Yashiro, Hiroshi Sata, Yusuke Arii
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Patent number: 11255756Abstract: A testing vessel 1 includes a flexible vessel body 10 having a bottom and a hollow shape; and a partition 11 axially extending in the vessel body 10 and dividing an analyte extract containable space 50 in the vessel body 10 into two or more compartments. The testing vessel 1 enables two or more items to be readily tested with two or more test pieces.Type: GrantFiled: March 13, 2017Date of Patent: February 22, 2022Assignee: SEKISUI MEDICAL CO., LTD.Inventors: Kazunori Saito, Hiroyuki Oono, Kimiyoshi Nishitani, Motoki Morita, Shinji Matsuura, Hiroshi Yashiro
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Publication number: 20190017903Abstract: A testing vessel 1 includes a flexible vessel body 10 having a bottom and a hollow shape; and a partition 11 axially extending in the vessel body 10 and dividing an analyte extract containable space 50 in the vessel body 10 into two or more compartments. The testing vessel 1 enables two or more items to be readily tested with two or more test pieces.Type: ApplicationFiled: March 13, 2017Publication date: January 17, 2019Applicant: SEKISUI MEDICAL CO., LTD.Inventors: Kazunori SAITO, Hiroyuki OONO, Kimiyoshi NISHITANI, Motoki MORITA, Shinji MATSUURA, Hiroshi YASHIRO
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Patent number: 7080227Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: GrantFiled: February 5, 2002Date of Patent: July 18, 2006Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Kazuo Horikawa, Hiroshi Yashiro, Masahiko Yamauchi, Yasuhiro Ishii, Daisuke Sasaki
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Patent number: 7062627Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: GrantFiled: August 19, 2003Date of Patent: June 13, 2006Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Kazuo Horikawa, Hiroshi Yashiro, Masahiko Yamauchi, Yasuhiro Ishii, Daisuke Sasaki
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Patent number: 6970912Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.Type: GrantFiled: May 18, 1999Date of Patent: November 29, 2005Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Hiroshi Yashiro, Satoshi Yoshizawa, Kazuo Horikawa, Takehisa Hayashi, Hiroshi Iwamoto, Kimitoshi Yamada
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Publication number: 20040054865Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: ApplicationFiled: August 19, 2003Publication date: March 18, 2004Applicant: Hitachi, LimitedInventors: Hideki Murayama, Kazuo Horikawa, Hiroshi Yashiro, Masahiko Yamauchi, Yasuhiro Ishii, Daisuke Sasaki
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Patent number: 6684312Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: GrantFiled: January 8, 1999Date of Patent: January 27, 2004Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Kazuo Horikawa, Hiroshi Yashiro, Masahiko Yamauchi, Yasuhiro Ishii, Daisuke Sasaki
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Publication number: 20030126420Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.Type: ApplicationFiled: May 18, 1999Publication date: July 3, 2003Inventors: HIDEKI MURAYAMA, HIROSHI YASHIRO, SATOSHI YOSHIZAWA, KAZUO HORIKAWA, TAKEHISA HAYASHI, HIROSHI IWAMOTO, KIMITOSHI YAMADA
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Patent number: 6557034Abstract: Before transferring data, a transmitting computer acquires a transfer rate of an I/O bus to which a communication control device in a receiving computer is connected. When transmitting data, the communication control device refers to a connection control table and a receiver control table, and chooses a transmitting queue for data transmission from a plurality of transmitting queues so that an interval is inserted between transmissions of data, and the data can be transmitted to the receiving computer without loss. The transmission intervals of data are determined based on the transfer rate of the I/O bus to which the communication control device in the receiving computer is connected.Type: GrantFiled: February 3, 2000Date of Patent: April 29, 2003Assignee: Hitachi, Ltd.Inventors: Hirofumi Fujita, Hideki Murayama, Hiroshi Yashiro
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Patent number: 6477560Abstract: A control method of controlling a computer for controlling a resource connected to the computer and shared by a plurality of programs included in the computer includes the steps of storing a control information ID indicating a storage area in the main memory storing control information concerning access between a certain program and the resource in an OS space of a main memory, storing the control information ID in an adaptor connected to the main memory via a bus, and taking out the control information from the storage area included in the OS space, by using the control information ID stored in the adapter. In the case where the adapter runs short of a storage area, information that the adapter runs short of a storage area in the main memory is conveyed via the bus. By using the control information thus taken out, the resource is controlled.Type: GrantFiled: November 16, 1998Date of Patent: November 5, 2002Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Hiroshi Yashiro, Takehisa Hayashi, Masahiro Kitano
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Publication number: 20020073292Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: ApplicationFiled: February 5, 2002Publication date: June 13, 2002Applicant: Hitachi, LimitedInventors: Hideki Murayama, Kazuo Horikawa, Hiroshi Yashiro, Masahiko Yamauchi, Yasuhiro Ishii, Daisuke Sasaki
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Publication number: 20020029325Abstract: An information processing apparatus for allowing a memory to be added thereto while being powered. The apparatus comprises a processor, a first main memory initially connected, and a connecting switch. The switch connects the processor, the first main memory, and a second main memory to be added. Main memory management information in the first main memory includes the size of memory resources connected to the processor. A storage region in the connecting switch retains information about whether or not the processor is connected to each of the memories. The setup allows the apparatus to use the added memory without having to be restarted.Type: ApplicationFiled: January 8, 1999Publication date: March 7, 2002Inventors: HIDEKI MURAYAMA, KAZUO HORIKAWA, HIROSHI YASHIRO, MASAHIKO YAMAUCHI, YASUHIRO ISHII, DAISUKE SASAKI
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Patent number: 6108694Abstract: A memory disc sharing method in which a plurality of computers share a memory disc through a network, wherein a command in accordance with which the memory disc is accessed is received by a network interface apparatus, and when a requested computer to which a request of the command has been made is any of other computers, the command is transmitted to the any of other computers, and when the requested computer is a computer concerned, the command is stored in a memory disc command queue. The network interface apparatus retrieves the command from the memory disc command queue, and executes the processing of reading out/writing data from/to the memory disc in the computer concerned when a requesting computer from which a request of the command has been made is the computer concerned, and carries out the data transfer between the memory disc in the computer concerned and the requesting computer when the requesting computer is any of other computers.Type: GrantFiled: November 18, 1998Date of Patent: August 22, 2000Assignee: Hitachi, Ltd.Inventors: Hiroshi Yashiro, Hideki Murayama, Hirofumi Fujita, Takehisa Hayashi, Masahiro Kitano
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Patent number: 5935205Abstract: A computer system having a plurality of computers connected to each other by a computer coupling mechanism. Each computer includes a processor, memory, I/O device, disk control mechanism, computer coupling network adapter, disk requirement processing section connected to a system bus, and a disk connected to a disk control mechanism. The disk requirement processing section controls the disk, in response to a processing requirement for the disk from one of the processors of the other computers, based on structural definition information. The structural definition information describes a structure of the computer system. The computer system may be a loosely-coupled computer system.Type: GrantFiled: June 21, 1996Date of Patent: August 10, 1999Assignee: Hitachi, Ltd.Inventors: Hideki Murayama, Hiroshi Yashiro, Satoshi Yoshizawa, Kazuo Horikawa, Takehisa Hayashi, Hiroshi Iwamoto, Kimitoshi Yamada
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Patent number: 5649102Abstract: A distributed shared memory management system for a distributed shared memory computer system having a plurality of computers interconnected by a network, each computer having an independent address space and logically sharing data physically distributed to a storage of each computer. Each computer running a program for reading/changing the shared data includes a coherence control designation command for designating to enter a mutual exclusion state in which two or more computers cannot change the logically single shared data, a coherence control release command for designating a release of the mutual exclusion state, and a coherence control execution command for reflecting the contents of the shared data changed between the coherence control designation command and the coherence control release command, upon the logically single shared data in another computer.Type: GrantFiled: November 25, 1994Date of Patent: July 15, 1997Assignee: Hitachi, Ltd.Inventors: Masahiko Yamauchi, Satoshi Yoshizawa, Hideki Murayama, Takehisa Hayashi, Akira Kito, Hiroshi Yashiro, Tsutomu Goto, Kimitoshi Yamada, Toru Horimoto