Patents by Inventor Hiroshi Yumoto

Hiroshi Yumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10516848
    Abstract: An image processing device includes a frame memory, an image input unit, an image quality converter that converts, on a frame basis, image quality of image information stored in the frame memory, an image output unit that reads the image information from the frame memory and outputs the image information to a display device, a controller that controls a function of the image quality converter based on a traveling state of the vehicle and changes a frame delay amount from when each of frames of the image information is received until when the frame is outputted from the image output unit, and an interpolation frame setting unit that sets an interpolation frame of the image information to be outputted in a transition period in which the controller changes the frame delay amount from a first frame delay amount to a second frame delay amount.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: December 24, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Hiroshi Yumoto
  • Publication number: 20190124292
    Abstract: An image processing device includes a frame memory, an image input unit, an image quality converter that converts, on a frame basis, image quality of image information stored in the frame memory, an image output unit that reads the image information from the frame memory and outputs the image information to a display device, a controller that controls a function of the image quality converter based on a traveling state of the vehicle and changes a frame delay amount from when each of frames of the image information is received until when the frame is outputted from the image output unit, and an interpolation frame setting unit that sets an interpolation frame of the image information to be outputted in a transition period in which the controller changes the frame delay amount from a first frame delay amount to a second frame delay amount.
    Type: Application
    Filed: March 9, 2017
    Publication date: April 25, 2019
    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Hiroshi YUMOTO
  • Publication number: 20190103501
    Abstract: A light-receiving device of an embodiment of the present disclosure includes, on a first principal surface of a semiconductor layer, a pixel region that includes a plurality of light-receiving pixels each receiving light incident from side of a second principal surface of the semiconductor layer. The light-receiving device further includes, throughout a gap between the second principal surface and the pixel region, a low-impurity region having a relatively lower impurity concentration than the pixel region. The light-receiving pixels each include one or a plurality of photoelectric current extraction regions each including, on the first principal surface, an anode region and a cathode region, and a circuit region that is electrically coupled to each of the cathode regions and is electrically separated from the impurity region.
    Type: Application
    Filed: February 15, 2017
    Publication date: April 4, 2019
    Applicant: SONY CORPORATION
    Inventors: Takahiro IGARASHI, Takahiro SONODA, Atsushi SUZUKI, Shinya YAMAKAWA, Hiroshi YUMOTO, Izuho HATADA, Takeshi KODAMA, Kiwamu ADACHI, Katsuji MATSUMOTO
  • Publication number: 20140319643
    Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.
    Type: Application
    Filed: July 7, 2014
    Publication date: October 30, 2014
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Tomokazu Mukai, Katsuhiko Takeuchi
  • Patent number: 8803272
    Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: August 12, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Tomokazu Mukai, Katsuhiko Takeuchi
  • Publication number: 20120081638
    Abstract: A light sensing element includes a photodiode formed on a semiconductor substrate surface, and a laminated structure formed on the photodiode, wherein the laminated structure includes a first layer formed of a silicon oxide film, a second layer formed on the first layer and formed of a silicon nitride film, and a third layer formed on the second layer and formed of a polysilicon film.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Yusuke Murakawa, Hideo Yamagata
  • Publication number: 20100155875
    Abstract: A semiconductor device includes: a P-type semiconductor substrate; a first P-type semiconductor layer formed on the P-type semiconductor substrate; a second P-type semiconductor layer formed on the first P-type semiconductor layer and having a lower P-type impurity concentration than the first P-type semiconductor layer; an N-type semiconductor layer, which will form a cathode region, formed on the second P-type semiconductor layer; a first P-type diffusion layer formed by diffusing a P-type impurity in a partial region of the second P-type semiconductor layer; a second P-type diffusion layer formed by diffusing a P-type impurity in the second P-type semiconductor layer so as to be present adjacently beneath the first P-type diffusion layer at a lower P-type impurity concentration than the first P-type diffusion layer; and a photodiode formed in such a manner that the N-type semiconductor layer and the first P-type diffusion layer are isolated from each other.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 24, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Tomokazu Mukai, Katsuhiko Takeuchi