Patents by Inventor Hiroshige Hayashizaki

Hiroshige Hayashizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11023203
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 1, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Publication number: 20190205092
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Application
    Filed: March 11, 2019
    Publication date: July 4, 2019
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Patent number: 10228907
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: March 12, 2019
    Assignee: International Business Machines Corporation
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Publication number: 20170161019
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Application
    Filed: February 21, 2017
    Publication date: June 8, 2017
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Patent number: 9612799
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: April 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Publication number: 20150178338
    Abstract: A first record group and a second record group having a tree structure are merge-sorted. The first record group and the second record group are acquired, and depth information indicative of the hierarchical depth of the tree structure is attached as metadata to key information on each node of each record included in the acquired first record group and second record group. The depth information is compared in preference to the key information to perform merge sort sequentially.
    Type: Application
    Filed: December 12, 2014
    Publication date: June 25, 2015
    Inventors: Hiroshige Hayashizaki, Megumi Ito
  • Patent number: 8856762
    Abstract: A loop detection method, system, and article of manufacture for determining whether a sequence of unit processes continuously executed among unit processes in a program is a loop by means of computational processing performed by a computer. The method includes: reading address information on the sequence of unit processes; comparing an address of a unit process as a loop starting point candidate with an address of a last unit process in the sequence of unit processes; reading call stack information on the sequence of unit processes; comparing a call stack upon execution of the unit process as the loop starting point candidate with a call stack upon execution of the last unit process; outputting a determination result indicating that the sequence of unit processes forms a loop if the respective comparison results of the addresses and the call stacks match with each other.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventor: Hiroshige Hayashizaki
  • Patent number: 8756581
    Abstract: An apparatus includes a processor for executing instructions at runtime and instructions for dynamically compiling the set of instructions executing at runtime. A memory device stores the instructions to be executed and the dynamic compiling instructions. A memory device serves as a trace buffer used to store traces during formation during the dynamic compiling. The dynamic compiling instructions includes a next-executing-cycle (N-E-C) trace selection process for forming traces for the instructions executing at runtime. The N-E-C trace selection process continues through an existing trace-head when forming traces without terminating a recording of a current trace if an existing trace-head is encountered.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Jose G. Castanos, Hiroshige Hayashizaki, Hiroshi Inoue, Mauricio J. Serrano, Peng Wu
  • Patent number: 8584110
    Abstract: An execution trace of building blocks of computer code includes a head building block at which the execution trace starts, and a tail building block at which the execution trace ends. The building blocks are executable in a sequence from the head building block to the tail building block. The execution trace is truncated at a particular building block of the execution trace, which becomes the tail building block. The particular building block can correspond to a head building block of an additional execution trace, and/or to a loop header building block of a loop within the execution trace and at which the loop is entered. The execution trace is a compilation unit on which basis a trace-based compiler computer program generates an executable version of the code at least by compiling these units.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: November 12, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hiroshi Inoue, Hiroshige Hayashizaki, Peng Wu
  • Patent number: 8549498
    Abstract: Integrated trace selection and profiling in dynamic optimizers may include selecting a trace head based on profile of basic blocks that are executed. The basic blocks executed from the trace head may be recorded as a trace. The trace may be added to a trace nursery in non-compiled state. The trace may be interpreted and profiled until the trace matures. Under a profiling mode, path sensitive runtime information such as values, types, targets of call-sites, and exit frequencies can be collected. The trace may be moved out of the nursery to a compilation queue in response to determining that the trace has matured based on an execution count of the profiled trace.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: October 1, 2013
    Assignee: International Business Machines Corporation
    Inventors: Hiroshige Hayashizaki, Hiroshi Inoue, Peng Wu
  • Publication number: 20130086567
    Abstract: An execution trace of building blocks of computer code includes a head building block at which the execution trace starts, and a tail building block at which the execution trace ends. The building blocks are executable in a sequence from the head building block to the tail building block. The execution trace is truncated at a particular building block of the execution trace, which becomes the tail building block. The particular building block can correspond to a head building block of an additional execution trace, and/or to a loop header building block of a loop within the execution trace and at which the loop is entered. The execution trace is a compilation unit on which basis a trace-based compiler computer program generates an executable version of the code at least by compiling these units.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 4, 2013
    Inventors: Hiroshi Inoue, Hiroshige Hayashizaki, Peng Wu
  • Publication number: 20130055226
    Abstract: Integrated trace selection and profiling in dynamic optimizers may include selecting a trace head based on profile of basic blocks that are executed. The basic blocks executed from the trace head may be recorded as a trace. The trace may be added to a trace nursery in non-compiled state. The trace may be interpreted and profiled until the trace matures. Under a profiling mode, path sensitive runtime information such as values, types, targets of call-sites, and exit frequencies can be collected. The trace may be moved out of the nursery to a compilation queue in response to determining that the trace has matured based on an execution count of the profiled trace.
    Type: Application
    Filed: August 23, 2011
    Publication date: February 28, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: HIROSHIGE HAYASHIZAKI, HIROSHI INOUE, PENG WU
  • Publication number: 20120204164
    Abstract: An apparatus includes a processor for executing instructions at runtime and instructions for dynamically compiling the set of instructions executing at runtime. A memory device stores the instructions to be executed and the dynamic compiling instructions. A memory device serves as a trace buffer used to store traces during formation during the dynamic compiling. The dynamic compiling instructions includes a next-executing-cycle (N-E-C) trace selection process for forming traces for the instructions executing at runtime. The N-E-C trace selection process continues through an existing trace-head when forming traces without terminating a recording of a current trace if an existing trace-head is encountered.
    Type: Application
    Filed: February 3, 2011
    Publication date: August 9, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jose G. Castanos, Hiroshige Hayashizaki, Hiroshi Inoue, Mauricio J. Serrano, Peng Wu
  • Publication number: 20120137111
    Abstract: A loop detection method, system, and article of manufacture for determining whether a sequence of unit processes continuously executed among unit processes in a program is a loop by means of computational processing performed by a computer. The method includes: reading address information on the sequence of unit processes; comparing an address of a unit process as a loop starting point candidate with an address of a last unit process in the sequence of unit processes; reading call stack information on the sequence of unit processes; comparing a call stack upon execution of the unit process as the loop starting point candidate with a call stack upon execution of the last unit process; outputting a determination result indicating that the sequence of unit processes forms a loop if the respective comparison results of the addresses and the call stacks match with each other.
    Type: Application
    Filed: November 21, 2011
    Publication date: May 31, 2012
    Applicant: International Business Machines Corporation
    Inventor: Hiroshige Hayashizaki