Patents by Inventor Hiroshige Ogawa

Hiroshige Ogawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wiring design support apparatus for bond wire of semiconductor devices
    Patent number: 7725847
    Abstract: A design support apparatus supports wiring design for bond wires that connect a semiconductor chip and an interposer. The design support apparatus includes a creating unit that creates simulated design data simulating occurrence of fluctuation in an arrangement position of a semiconductor chip on an interposer and occurrence of fluctuation in bond wire connection terminal positions of the interposer, and an analyzing unit that analyzes, based on the simulated design data, deficiencies in manufacturing of semiconductor devices due to the fluctuation in the arrangement position of the semiconductor chip on the interposer and the fluctuation in the bond wire connection terminal positions of the interposer.
    Type: Grant
    Filed: November 1, 2004
    Date of Patent: May 25, 2010
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Renesas Technology Corp.
    Inventors: Akihiro Goto, Hironori Matsushima, Hiroshige Ogawa, Yoshio Matsuda
  • Design Support Apparatus for Semiconductor Devices
    Publication number: 20080250363
    Abstract: A design support apparatus supports wiring design for bond wires that connect a semiconductor chip and an interposer. The design support apparatus includes a creating unit that creates simulated design data simulating occurrence of fluctuation in an arrangement position of a semiconductor chip on an interposer and occurrence of fluctuation in bond wire connection terminal positions of the interposer, and an analyzing unit that analyzes, based on the simulated design data, deficiencies in manufacturing of semiconductor devices due to the fluctuation in the arrangement position of the semiconductor chip on the interposer and the fluctuation in the bond wire connection terminal positions of the interposer.
    Type: Application
    Filed: November 1, 2004
    Publication date: October 9, 2008
    Applicants: MITSUBISHI DENKI KABUSHIKI KAISHA, RENESAS TECHNOLOGY CORP.
    Inventors: Akihiro Goto, Hironori Matsushima, Hiroshige Ogawa, Yoshio Matsuda