Abstract: A method of synthesizing a real image and a computer graphic (CG) having a complex shape in which the normal vector of each of two adjacent planes of a rectangular parallelepiped CG circumscribed about the CG having a complex shape is determined from the coordinates of six vertices representing the two planes on the basis of a real image of a rectangular parallelepiped, and parameters for three-dimensional rotational transformation of the rectangular parallelepiped CG required for synthesis are determined on the basis of the normal vectors. A CG having a complex shape for synthesis is produced by rotational transformation thereof on the basis of the parameters, and the CG having a complex shape thus produced is synthesized on the real image.

Abstract: A motion picture image editing method and in particular, a method for detecting such camera works as zooming and panning motions from a motion picture image stored in video tape or the like. In this method, a motion picture image constituted by a plurality of consecutive picture images on every frame basis, and on time series basis and on the basis of a correlation value for a displacement between the frames at a typical point determined for each of small blocks constituting the motion picture image, a motion vector for each of the small blocks is detected. Then a first motion parameter for estimation of a motion of a camera is generated with use of the motion vector detected at corresponding one of the typical points of first one of the frames. Or the first motion parameter for estimation of the motion of the camera is generated with use of a combination of the motion vector and a position vector at corresponding one of the typical points of a second frame inputted previous by one frame to the first frame.

Abstract: When a guidance function is actuated in a guidance method in a computer system, icons displayed on a screen are picked up to form their list. When a user designates an icon requiring the guidance, the guidance scenario corresponding to the designated icon is picked up, and icons required to execute the guidance scenario is allotted to the guidance scenario from the list. Thereafter, the guidance scenario is demonstrated using the allotted icons.

Abstract: In the present invention, there is provided an optical disk medium wherein a ROM region having data already recorded therein and capable of only optically reproducing (reading) the data as well as a RAM region capable of optically recording and reading out therein and therefrom are interlacedly located in such a positional relationship that enables the substantially continuous and high-speed accessing operation to the read-only ROM and rewritable RAM data, and some of stationary data to be stored suitably in the ROM region are stored in positional relationship closer to some of additional data to be stored suitably in the RAM region which are especially closely related to the some of the stationary data.

Abstract: There is provided a method for detecting change points between cuts from motion picture images including a plurality of consecutive images. First of all, in this method, motion picture images which are the subject of detection of change point between cuts are inputted in a time series by taking a frame as the unit, and a predetermined feature quantity including a color histogram possessed by image data of said motion picture images is produced while taking a frame as the unit. A correlation coefficient with respect to feature quantity between the above described feature quantity and a feature quantity produced in an immediately preceding frame is then produced. Further, a change rate between the correlation coefficient of the current frame and a correlation coefficient produced for a frame preceding the current frame is produced. A time point whereat the change rate exceeds a predetermined allowable value is detected as a change point between cuts of the motion picture images.

Abstract: A multiprocessor system includes processor units connected physically in one-dimensional fashion along a ring bus located at the node of each processor element and associated local memory, so that various system operating modes are possible. The ring bus is used for inter-processor data transfer, with the address and read/write signals to each local memory being supplied from the processor element (by the program). Sychronization between the data flow on the ring bus and the processor operation is made automatic by the innovated method of inter-processor connection, which includes flag latches in the ring bus, whereby the system accomplishes extremely high-speed processing.

Abstract: A digital signal processor for determining the maximum and minimum values of a plurality of data items wherein operations of an arithmetic logic unit and data memories are controlled by micro-instructions, including a device for decoding specified bits of an operand of the micro-instruction, a device for detecting a value of a condition code which has been designated by an output of the decoding device, and a control device for executing a logical operation between the output of the detection device, which becomes "1" if the value of the condition code is true, and a decoded value of an operation code of the micro-instruction and to generate a control signal for the arithmetic logic unit on the basis of a result of the logical operation.

Abstract: A processor comprises first and second operation units, a first program memory which contains first microinstructions for controlling the first operation unit and second microinstructions for controlling at least the second operation units, a second program memory which contains microinstructions for controlling the second operation unit, first control means connected to the first program memory for controlling the first operation unit and the second operation unit, and second control means connected to the second program memory for controlling the second operation unit. In a normal mode, all operation units are under control of the first control means and in a multiprogram mode, the first operation unit is under control of the first control means and the second operation unit is under control of the second control means. These two mode operations are selected in accordance with the microinstructions stored in the first or second program memories.

Abstract: This invention relates to an information processing apparatus such as a digital signal processor and is applied particularly suitably to a digital filter.A plurality of data from initial value data till final value data relating to filtering coefficients of a digital filter are stored in a data memory, and are sequentially read out by an increment operation of an address arithmetic unit.A data arithmetic unit executes sequentially product and/or sum operations of a plurality of data that are sequentially read out and digital input signals that are sequentially inputted, to perform digital signal processing.The information processing apparatus is equipped particularly with means, which when an access address starts from an initial value, exceeds a final value and reaches a return address due to the increment operation, returns automatically the access address to the initial value. Therefore, a plurality of data stored in the data memory can be utilized repeatedly.

Abstract: A high-speed multiplier adapted to VLSI with a regularly arranged structure having a reduced number of addition stages. There is provided a carry save adder circuit wherein a time difference is imparted to signals input to full adders, in order to eliminate extra wait time in the signal propagation. That is, a carry signal of a full adder of two stages over is input with a speed increase of 1/2T.sub.FA.

Abstract: An LSI system is disclosed in which a plurality of status registers for indicating the internal status of the system are connected to each other so as to form a hierarchical structure and the contents of each of the remaining status registers other than one status register can be transferred to an output register through a bus, to make it possible to provide additional status registers in the system without increasing the number of address signals used and the number of pins connected to external address signal lines.

Abstract: A memory circuit is divided into a plurality of memory blocks, and an address register and a delay register are disposed in each memory block. Therefore, a read or write operation and a shifting operation of the address for storing data inside a memory matrix can be realized by a pipeline technique, and hence a memory circuit having a high processing speed is obtained.

Abstract: A coded label comprising a code pattern in which first and second segments respectively being substantially square and having reflection factors different from each other are arranged in at least four rows and two columns, and in which at least two of either of the first and second segments are arranged in each column and at least one is arranged in each of the uppermost and lowermost rows.

Abstract: In a mark detecting system using an image pickup device such as a TV camera in which a mark in the form of a regressive reflector is provided on an object, the field of view of the image pickup device is illuminated with light of a specified wavelength from an illuminating device placed in the vicinity of the image pickup device. The reflected light is introduced on the image pickup device through a filter capable of cutting off light having wavelengths other than the specified wavelength. Since the mark forms a bright pattern on an image produced within the field of view of the image pickup device, the position of the mark can be easily detected by means of a data processor which processes image signals.

Abstract: An electrostatic display device includes an insulative base, a substantially transparent fixed electrode mounted on the base, a substantially transparent dielectric layer such as silicon dioxide applied on the outer surface of the fixed electrode, a resilient sheet electrode fixed at one end thereof to the base and extending therefrom adjacent to the fixed electrode, a means for applying a voltage between the fixed electrode and the sheet electrode, and a display placed on or behind the inner surface of the fixed electrode. When there is no voltage between the fixed and the sheet electrodes, the display is visible through the transparent fixed electrode and the dielectric layer, whereas upon applying a voltage between the fixed and the sheet electrodes, the sheet electrode is attracted to and covers the outer surface of the fixed electrode, thereby concealing the display.

Abstract: A pattern display system is disclosed which includes a keyboard for the manual entry of data representative of the patterns to be displayed, a microcomputer for accepting the entry data and for controlling the display system, a random access memory for storage of the entered data, audio circuitry controlled by the microcomputer for accepting data to provide audio signals representative of stored data, coding/decoding circuitry for the transfer of stored digital data to or from a tape recorder, and video circuitry utilized under the control of the microcomputer for the visual display on a cathode ray tube (CRT) of the patterns represented by the stored data. Specifically, the video circuitry includes read-only memories which are controlled to provide video pattern information in response to the stored data which represented desired patterns and timing information for the CRT.

Abstract: An electrostatic display device includes a casing with a pair of side walls, a fixed electrode having a cylindrical surface and a ridge at the upper most portion of the surface, a pair of flaps of resilient sheet electrode standing adjacent to the fixed electrode along the inner surface of the side walls, and a layer of insulating material provided on the outer surface of the fixed electrode and/or the inner surface of the resilient sheet electrode, whereby upon applying a voltage to the electrodes, the resilient flaps are attracted to the cylindrical surface of the fixed electrode and cover the same in a moment, changing the appearance of the device.

Abstract: This method for recognizing a specific pattern is characterized in a process of extracting feature parts wherein one or more certain feature parts of specific shape are extracted from an input pattern; the next feature part is then extracted from an extracting area which is determined from the position on the input pattern where a previous feature part was extracted; and in case that the next feature part fails to be extracted from the extracting area so determined, the initial condition is restored thereby extracting the feature part by successively limiting extracting areas.

Abstract: A pattern recognition system comprises a partial pattern cutting out system which has a plurality of cutting out windows previously provided in correspondence with a plurality of regions in a specific pattern which respectively correspond to a characteristic part of the specific pattern to be recognized and which constitute patterns symmetric to each other. A binary input signal is cut out by the use of the partial pattern cutting out apparatus. The "EXCLUSIVE OR" function between the corresponding bits of the partial patterns obtained from the plurality of cutting out windows are evaluated by "EXCLUSIVE OR" circuits. The number of outputs of predetermined logic level among the outputs of the "EXCLUSIVE OR" circuits and a preset number are compared, and the coincidence between both the numbers is sought. When both numbers coincide, the inputted signal is recognized as being the specific pattern.

Abstract: A pattern recognition system comprises a picture tube for picking up an object to be recognized, a partial image pattern cutting out apparatus which, in turn, outputs a plurality of partial image patterns cut out from an image pattern obtained from the picture tube, the partial image patterns being output in synchronization with the scanning of the picture tube and a memory storing a plurality of partial standard patterns. Each of the partial image patterns is compared with the respective partial standard patterns and the respective partial image patterns similar to each partial standard pattern are grouped every partial standard pattern. A group of the partial image patterns, each of which is closely spaced from each other in a position of two-dimensional coordinate is selected from each group of the grouped partial image patterns and the respective representative positions of the respective elected groups of the partial image patterns are calculated.