Patents by Inventor Hirotaka Geka

Hirotaka Geka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113247
    Abstract: An infrared detecting device is provided. The infrared detecting device includes: a semiconductor substrate; a first layer having a first conductivity type on the semiconductor substrate; a light receiving layer on the first layer; and a second layer having a second conductivity type on the light receiving layer. A part of the first layer, the light receiving layer, and the second layer form a mesa structure. The second layer contains AlzIn1-zSb (0.05<z<0.18). The side surfaces and an upper surface of the mesa structure are covered with the protective layer. A part of an upper surface of the second layer that forms an interface between the second layer and the protective layer has an oxide layer made of a constituent material of the second layer. The oxide layer includes an oxide of Al and has no oxide of Sb.
    Type: Application
    Filed: June 8, 2023
    Publication date: April 4, 2024
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Osamu MOROHARA, Yoshiki SAKURAI, Hiromi FUJITA, Hirotaka GEKA
  • Patent number: 11935973
    Abstract: Disclosed is an infrared detecting device with a high SNR. The infrared detecting device 100 includes a semiconductor substrate 10; a first layer 20 formed on the semiconductor substrate and having a first conductivity type; a light receiving layer 30 formed on the first layer; and a second layer 40 formed on the light receiving layer and having a second conductivity type. The first layer includes, in the stated order: a layer containing Alx(1)In1-x(1)Sb; a layer having a film thickness ty(1) in nanometers and containing Aly(1)In1-y(1)Sb; and a layer containing Alx(2)In1-x(2)Sb, where ty(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<ty(1)?2360×(y(1)?x(j))?240 (0.11?y(1)?x(j)?0.19), 0<ty(1)??1215×(y(1)?x(j))+427 (0.19<y(1)?x(j)?0.33), and 0<x(j)<0.18.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: March 19, 2024
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Osamu Morohara, Hiromi Fujita, Hirotaka Geka
  • Patent number: 11715808
    Abstract: Provided is an infrared detecting device with a high SNR. The infrared detecting device includes: a semiconductor substrate 10; a first layer 21 having a first conductivity type on the semiconductor substrate; a light receiving layer 22 on the first layer; and a second layer 23 having a second conductivity type on the light receiving layer. A part of the first layer, the light receiving layer, and the second layer form a mesa structure, the light receiving layer contains AlxIn1-xSb (0.05<x<0.18), and at least a part of side surfaces of the mesa structure are covered with a protective layer, and part of the protective layer that is in contact with side surfaces of the light receiving layer is made of silicon nitride.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: August 1, 2023
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Osamu Morohara, Yoshiki Sakurai, Hiromi Fujita, Hirotaka Geka
  • Publication number: 20210288206
    Abstract: Provided is an infrared detecting device with a high SNR. The infrared detecting device includes: a semiconductor substrate 10; a first layer 21 having a first conductivity type on the semiconductor substrate; a light receiving layer 22 on the first layer; and a second layer 23 having a second conductivity type on the light receiving layer. A part of the first layer, the light receiving layer, and the second layer form a mesa structure, the light receiving layer contains AlxIn1-xSb (0.05<x<0.18), and at least a part of side surfaces of the mesa structure are covered with a protective layer, and part of the protective layer that is in contact with side surfaces of the light receiving layer is made of silicon nitride.
    Type: Application
    Filed: March 9, 2021
    Publication date: September 16, 2021
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Osamu MOROHARA, Yoshiki SAKURAI, Hiromi FUJITA, Hirotaka GEKA
  • Patent number: 10573782
    Abstract: Disclosed is an infrared light emitting device including: a semiconductor substrate; a first layer formed on the semiconductor substrate and having a first conductivity type; a light emitting layer formed on the first layer; and a second layer formed on the light emitting layer and having a second conductivity type, wherein the first layer includes, in the stated order: a layer containing Alx(1)In1?x(1)Sb; a layer having a film thickness ty(1) in nanometers and containing Aly(1)In1?y(1)Sb; and a layer containing Alx(2)In1?x(2)Sb, where ty(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<ty(1)?2360×(y(1)?x(j))?240 (0.11?y(1)?x(j)?0.19), 0<ty(1)??1215×(y(1)?x(j))+427 (0.19<y(1)?x(j)?0.33), and 0<x(j)<0.18.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: February 25, 2020
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Osamu Morohara, Hiromi Fujita, Hirotaka Geka
  • Publication number: 20190267500
    Abstract: Disclosed is an infrared detecting device with a high SNR. The infrared detecting device 100 includes a semiconductor substrate 10; a first layer 20 formed on the semiconductor substrate and having a first conductivity type; a light receiving layer 30 formed on the first layer; and a second layer 40 formed on the light receiving layer and having a second conductivity type. The first layer includes, in the stated order: a layer containing Alx(1)In1-x(1)Sb; a layer having a film thickness ty(1) in nanometers and containing Aly(1)In1-y(1)Sb; and a layer containing Alx(2)In1-x(2)Sb, where ty(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<ty(1)?2360×(y(1)?x(j))?240 (0.11?y(1)?x(j)?0.19), 0<ty(1)??1215×(y(1)?x(j))+427 (0.19<y(1)?x(j)?0.33), and 0<x(j)<0.18.
    Type: Application
    Filed: February 27, 2019
    Publication date: August 29, 2019
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Osamu MOROHARA, Hiromi FUJITA, Hirotaka GEKA
  • Publication number: 20190198713
    Abstract: Disclosed is an infrared light emitting device including: a semiconductor substrate; a first layer formed on the semiconductor substrate and having a first conductivity type; a light emitting layer formed on the first layer; and a second layer formed on the light emitting layer and having a second conductivity type, wherein the first layer includes, in the stated order: a layer containing Alx(1)In1?x(1)Sb; a layer having a film thickness ty(1) in nanometers and containing Aly(1)In1?y(1)Sb; and a layer containing Alx(2)In1?x(2)Sb, where ty(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<ty(1)?2360×(y(1)?x(j))?240 (0.11?y(1)?x(j)?0.19), 0<ty(1)??1215×(y(1)?x(j))+427 (0.19<y(1)?x(j)?0.33), and 0<x(j)<0.18.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 27, 2019
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Osamu MOROHARA, Hiromi FUJITA, Hirotaka GEKA
  • Patent number: 8441037
    Abstract: An objective is to provide a semiconductor device capable of utilizing properties of a high-mobility electron transport layer with a thin film stacked structure having large ?Ec, high electron mobility, and simplified element fabrication process even when the substrate material and the electron transport layer greatly differ in lattice constant. The semiconductor device includes: a semiconductor substrate (1); a first barrier layer (2) on the substrate (1); an electron transport layer (3) on the first barrier layer (2); and a second barrier layer (4) on the electron transport layer (3). The first barrier layer (2) has an InxAl1-xAs layer. At least one of the first barrier layer (2) and the second barrier layer (4) has a stacked structure having an AlyGa1-yAszSb1-z layer in contact with the electron transport layer (3) and an InxAl1-xAs layer in contact with the AlyGa1-yAszSb1-z layer. The stacked structure is doped with a donor impurity.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: May 14, 2013
    Assignee: Asahi Kasei Microdevices Corporation
    Inventor: Hirotaka Geka
  • Patent number: 8154280
    Abstract: Relating to a thin film lamination and a thin film magnetic sensor using the thin film lamination and a method for manufacturing the thin film lamination that realizes a thin film conducting layer having high electron mobility and sheet resistance as an InAsSb operating layer. A thin film lamination is provided which is characterized by having an AlxIn1?xSb mixed crystal layer formed on a substrate, and an InAsxSb1?x (0<x?1) thin film conducting layer directly formed on the AlxIn1?xSb layer, in which the AlxIn1?xSb mixed crystal layer is a layer that exhibits higher resistance than the InAsxSb1?x thin film conducting layer or exhibits insulation or p-type conductivity, and its band gap is greater than the InAsxSb1?x thin film conducting layer, and the a lattice mismatch is +1.3% to ?0.8%.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 10, 2012
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Ichiro Shibasaki, Hirotaka Geka, Atsushi Okamoto
  • Publication number: 20120018782
    Abstract: An objective is to provide a semiconductor device capable of utilizing properties of a high-mobility electron transport layer with a thin film stacked structure having large ?Ec, high electron mobility, and simplified element fabrication process even when the substrate material and the electron transport layer greatly differ in lattice constant. The semiconductor device includes: a semiconductor substrate (1); a first barrier layer (2) on the substrate (1); an electron transport layer (3) on the first barrier layer (2); and a second barrier layer (4) on the electron transport layer (3). The first barrier layer (2) has an InxAl1-xAs layer. At least one of the first barrier layer (2) and the second barrier layer (4) has a stacked structure having an AlyGa1-yAszSb1-z layer in contact with the electron transport layer (3) and an InxAl1-xAs layer in contact with the AlyGa1-yAszSb1-z layer. The stacked structure is doped with a donor impurity.
    Type: Application
    Filed: March 31, 2010
    Publication date: January 26, 2012
    Inventor: Hirotaka Geka
  • Patent number: 7723814
    Abstract: The present invention relates to a thin film lamination to be used in a micro InSb thin film magnetic sensor which can directly detect a magnetic flux density with high sensitivity and has small power consumption and consumption current, and the InSb thin film magnetic sensor. The InSb thin film magnetic sensor uses an InSb thin film as a magnetic sensor section or a magnetic detecting section. The sensor includes an InSb layer that is an InSb thin film formed on a substrate, and an AlxGayIn1-x-ySb mixed crystal layer (0?x, y?1) which shows resistance higher than the InSb layer or insulation, or p-type conduction, and has a band gap larger than that of InSb. The mixed crystal layer is provided between the substrate and the InSb layer, and has a content of Al and Ga atoms (x+y) in the range of 5.0 to 17%.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: May 25, 2010
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Ichiro Shibasaki, Hirotaka Geka, Atsushi Okamoto
  • Publication number: 20100045282
    Abstract: Relating to a thin film lamination and a thin film magnetic sensor using the thin film lamination and a method for manufacturing the thin film lamination that realizes a thin film conducting layer having high electron mobility and sheet resistance as an InAsSb operating layer. A thin film lamination is provided which is characterized by having an AlxIn1-xSb mixed crystal layer formed on a substrate, and an InAsxSb1-x (0<x?1) thin film conducting layer directly formed on the AlxIn1-xSb layer, in which the AlxIn1-xSb mixed crystal layer is a layer that exhibits higher resistance than the InAsxSb1-x thin film conducting layer or exhibits insulation or p-type conductivity, and its band gap is greater than the InAsxSb1-x thin film conducting layer, and the a lattice mismatch is +1.3% to ?0.8%.
    Type: Application
    Filed: November 29, 2007
    Publication date: February 25, 2010
    Inventors: Ichiro Shibasaki, Hirotaka Geka, Atsushi Okamoto
  • Publication number: 20090001351
    Abstract: The present invention relates to a thin film lamination to be used in a micro InSb thin film magnetic sensor which can directly detect a magnetic flux density with high sensitivity and has small power consumption and consumption current, and the InSb thin film magnetic sensor. The InSb thin film magnetic sensor uses an InSb thin film as a magnetic sensor section or a magnetic detecting section. The sensor includes an InSb layer that is an InSb thin film formed on a substrate, and an AlxGayIn1-x-ySb mixed crystal layer (0?x, y?1) which shows resistance higher than the InSb layer or insulation, or p-type conduction, and has a band gap larger than that of InSb. The mixed crystal layer is provided between the substrate and the InSb layer, and has a content of Al and Ga atoms (x+y) in the range of 5.0 to 17%.
    Type: Application
    Filed: December 27, 2006
    Publication date: January 1, 2009
    Inventors: Ichiro Shibasaki, Hirotaka Geka, Atsushi Okamoto