Abstract: An air conditioner according to an aspect of the present disclosure includes a wall-mounted indoor unit which includes a heat exchanger, a blower, and a housing that accommodates the heat exchanger and the blower therein, and which is fixed to a wall surface, and a discharge unit which is disposed above the indoor unit outside the indoor unit, in which the housing includes a suction port that opens upward, the discharge unit includes a discharge device disposed above the suction port, at least a portion of air suctioned into the suction port passes through the discharge device, and a center of the discharge unit in a right-left direction of the indoor unit is disposed to be shifted to one side in the right-left direction with respect to a center of the indoor unit.

Abstract: An air conditioner according to an aspect of the present disclosure includes a wall-mounted indoor unit which includes a heat exchanger, a blower, and a housing that accommodates the heat exchanger and the blower therein, and which is fixed to a wall surface, and a discharge unit which is disposed above the indoor unit outside the indoor unit, in which the indoor unit includes a first control unit that controls the indoor unit, the housing includes a suction port that opens upward, the discharge unit includes a discharge device disposed above the suction port, at least a portion of air suctioned into the suction port passes through the discharge device, and the discharge device is driven based on a signal received from the first control unit.

Abstract: An input/output port, a birefringent element, variable polarization rotator, and a reflector are arranged along an optical axis in the order named. The variable polarization rotator includes permanent magnets for applying a fixed magnetic field to a Faraday rotator in an in-plane direction to magnetically saturate the Faraday rotator and a solenoid coil for applying a variable magnetic field to the Faraday rotator in a direction of the optical axis. A fixed magnetic field is applied in the <211> direction, in which the Faraday rotator is likely to be magnetically saturated. The Faraday rotator can be saturated with a low magnetic field of about 100 Oe. The permanent magnets may employ ferrite permanent magnets, which have weak magnetic forces. A variable magnetic field may also be reduced. Therefore, an air-core coil can be used.

Abstract: An input/output port, a birefringent element, variable polarization rotator, and a reflector are arranged along an optical axis in the order named. The variable polarization rotator includes permanent magnets for applying a fixed magnetic field to a Faraday rotator in an in-plane direction to magnetically saturate the Faraday rotator and a solenoid coil for applying a variable magnetic field to the Faraday rotator in a direction of the optical axis. A fixed magnetic field is applied in the <211> direction, in which the Faraday rotator is likely to be magnetically saturated. The Faraday rotator can be saturated with a low magnetic field of about 100 Oe. The permanent magnets may employ ferrite permanent magnets, which have weak magnetic forces. A variable magnetic field may also be reduced. Therefore, an air-core coil can be used.

Abstract: A charge pump includes a switching circuit which is interposed among first and second output capacitors, a flying capacitor, and an input power supply; and a control unit which controls the switching circuit. The charge pump is operated in an operation mode including a high-voltage outputting mode, a low-voltage outputting mode, and a relay mode. The control unit controls the switching circuit so that respective charging voltages of the first and second capacitors that are charged in the high-voltage outputting mode are gradually lowered. The control unit changes the operation mode of the charge pump by relay transition from the high-voltage outputting mode through the relay mode to the low-voltage outputting mode when a voltage lower command is given during a period when the operation mode of the charge pump is in the high-voltage outputting mode.

Abstract: A successive approximation A/D converter, includes a reference voltage generation circuit, a sample/hold circuit, a D/A converter circuit, a comparator, and a control circuit. A potential difference between the comparison target voltage generated by the D/A converter circuit and the internal analog voltage is applied to one input terminal of the comparator through a first signal line, and the reference voltage generation circuit is connected to the other input terminal of the comparator through a second signal line and a switch. Capacitive elements are disposed between the high potential power supply and the second signal line, and between the second signal line and the low potential power supply, respectively. The control circuit turns ON the switch to charge the first and second capacitive elements during a period when the sample/hold circuit samples and holds the internal analog voltage and turns OFF the switch in response to end of the period.

Abstract: A controller 100 updates data LVLm indicative of a level section of an input audio signal and controls a reference level Vr based on a signal CMP representative of a comparison result between the input audio signal and the reference level Vr, and further, controls gains of electronic volumes 10L and 10R in such a manner that these gains become such gains corresponding to the level section of the input audio signal. In this case, the level sections of the input audio signals are related to the gains in such a manner that levels of output signals of the electronic volumes do not exceed a previously set output amplitude upper limit level.

Abstract: A pulse monitor circuit detects the presence or non-presence of the output pulses output from an output stage circuit. The pulse monitor circuit outputs an up signal to the up/down counter when the output pulses do not exist at all and outputs a down signal to the up/down counter when the output pulses exist. The up/down counter outputs a signal for increasing the delay amount of a delay amount variable circuit when a count value is large, that is, when the output pulses disappear. In contrast, when the count value is small, that is, when the output pulses exist, the counter outputs the signal for reducing the delay amount of the delay amount variable circuit.

Abstract: An N-channel transistor is provided as a switch between a high potential power line and a low potential power line. A high-pass filter is constituted by a capacitor and a resistor. When a voltage between the high potential power line and the low potential power line is started to oscillate by a switching operation, the high-pass filter causes a high-pass component thereof to pass, thereby turning ON the N-channel transistor to reduce a ringing.

Abstract: A successive approximation A/D converter, includes a reference voltage generation circuit, a sample/hold circuit, a D/A converter circuit, a comparator, and a control circuit. A potential difference between the comparison target voltage generated by the D/A converter circuit and the internal analog voltage is applied to one input terminal of the comparator through a first signal line, and the reference voltage generation circuit is connected to the other input terminal of the comparator through a second signal line and a switch. Capacitive elements are disposed between the high potential power supply and the second signal line, and between the second signal line and the low potential power supply, respectively. The control circuit turns ON the switch to charge the first and second capacitive elements during a period when the sample/hold circuit samples and holds the internal analog voltage and turns OFF the switch in response to end of the period.

Abstract: A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion.

Abstract: A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage.

Abstract: The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result. A dither signal generation section 505 outputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoder 502 processes an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of “1” or “0” conforming to the input digital signal to be processed. An analog addition section 503 converts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.

Abstract: A charge pump includes a switching circuit which is interposed among first and second output capacitors, a flying capacitor, and an input power supply; and a control unit which controls the switching circuit. The charge pump is operated in an operation mode including a high-voltage outputting mode, a low-voltage outputting mode, and a relay mode. The control unit controls the switching circuit so that respective charging voltages of the first and second capacitors that are charged in the high-voltage outputting mode are gradually lowered. The control unit changes the operation mode of the charge pump by relay transition from the high-voltage outputting mode through the relay mode to the low-voltage outputting mode when a voltage lower command is given during a period when the operation mode of the charge pump is in the high-voltage outputting mode.

Abstract: A spectrum spreading circuit, includes a control portion that repeats a sequence in which the control portion generates a designation signal for designating all of plural frequencies in prescribed order by selecting a next frequency from the frequencies which have not been selected, and a signal generating portion that sequentially generates output signals having the designated frequencies respectively on the basis of the designation signal.

Abstract: A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage.

Abstract: A comparator has P-channel field effect transistors that are supplied at respective gates with input voltages Vin and Vref, which are objects of comparison, and that act as a differential transistor pair; and N-channel field effect transistors that serve as current channels for respective drain currents of these two P-channel field effect transistors and that act as a current mirror circuit. The comparator outputs a drain voltage Vx of an N-channel field effect transistor as a signal showing a result of comparison between the two input voltages. An N-channel field effect transistor diode-connected to the comparator is interposed between drains of the N-channel field effect transistors.

Abstract: An offset voltage correction circuit for a differential amplifier comprising NMOS transistors serving as a pair of differential transistors, and PMOS transistors serving as a pair of load transistors connected between outputs of the pair of differential transistors and a power source. The offset voltage correction circuit is equipped with a voltage generator for generating, between a source of any one of the pair of load transistors and the power source, a constant voltage for correcting an offset voltage of the differential amplifier.

Abstract: A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion.

Abstract: An N-channel transistor is provided as a switch between a high potential power line and a low potential power line. A high-pass filter is constituted by a capacitor and a resistor. When a voltage between the high potential power line and the low potential power line is started to oscillate by a switching operation, the high-pass filter causes a high-pass component thereof to pass, thereby turning ON the N-channel transistor to reduce a ringing.