Patents by Inventor Hirotaka Ohno

Hirotaka Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120228776
    Abstract: A semiconductor device is formed by molding using a resin with a semiconductor element and one or two heat dissipating plates contained therein, said one or two heat dissipating plates being disposed to face one surface or both the surfaces of the semiconductor element. An intermediate layer is formed by spraying a metal powder to the semiconductor element and to one of or both of the heat dissipating plates using a cold spray method, and the semiconductor element and the heat dissipating plate are bonded together using a solder with the intermediate layer therebetween.
    Type: Application
    Filed: May 18, 2012
    Publication date: September 13, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hirotaka OHNO
  • Publication number: 20120181685
    Abstract: Disclosed is a semiconductor device wherein the adhesion of resin to a substrate is improved at a low cost. A semiconductor element and one or two substrates opposing one or both of the surfaces of the semiconductor element are sealed by a resin, a resin bonding coat which is formed by spraying a metal powder by a cold spray method is formed on one or both of the substrates, and recess portions which are widened from a film surface in a depth direction are formed on the resin bonding coat.
    Type: Application
    Filed: May 21, 2010
    Publication date: July 19, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hirotaka Ohno
  • Publication number: 20120126411
    Abstract: A semiconductor device of the present invention has a purpose to form a structure of preventing outflow of solder at low costs. A semiconductor element is bonded to a substrate through a solder layer. An outflow-preventing part is provided to surround the solder layer to prevent solder outflow during soldering. The outflow-preventing part is formed by a cold spray method and has a surface in an oxidized state.
    Type: Application
    Filed: May 18, 2010
    Publication date: May 24, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hirotaka Ohno
  • Publication number: 20120043662
    Abstract: A purpose of the application is to provide a semiconductor device production method capable of reducing complexity of production operations and keeping production costs low, and enhancing reliability, and a semiconductor device. One aspect of the invention provides a method of producing a semiconductor device, the method including a first bonding step of bonding a first electrode plate and a semiconductor device portion, and a second bonding step of bonding the semiconductor device portion and a second electrode plate. The method includes a sealing step of forming a sealed composite body by covering target surfaces of a composite body formed by the first bonding step with resin, the target surfaces being surfaces other than a second surface of the first electrode plate and the second surface of the semiconductor device portion. The second bonding step is performed after the sealing step.
    Type: Application
    Filed: September 21, 2011
    Publication date: February 23, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hirotaka Ohno
  • Patent number: 8058554
    Abstract: A bus bar has a lead portion and a bus bar portion which are integrally shaped. The lead portion is provided in such a shape that branches from the bus bar portion. A part of the lead portion forms a connection part directly electrically connected with a transistor electrode and a diode electrode by a connecting material such as solder. The thickness of the lead portion including the connection part is made smaller than the thickness of the bus bar portion. Accordingly, such an interconnection structure can be provided in which the electrode of the semiconductor device and the bus bar are electrically directly connected with each other and thermal stress at the connection part therebetween can be relieved.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: November 15, 2011
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Hideo Nakamura, Tomoyuki Watanabe, Hirotaka Ohno, Nobuaki Inagaki
  • Publication number: 20100089607
    Abstract: A bus bar has a lead portion and a bus bar portion which are integrally shaped. The lead portion is provided in such a shape that branches from the bus bar portion. A part of the lead portion forms a connection part directly electrically connected with a transistor electrode and a diode electrode by a connecting material such as solder. The thickness of the lead portion including the connection part is made smaller than the thickness of the bus bar portion. Accordingly, such an interconnection structure can be provided in which the electrode of the semiconductor device and the bus bar are electrically directly connected with each other and thermal stress at the connection part therebetween can be relieved.
    Type: Application
    Filed: February 20, 2008
    Publication date: April 15, 2010
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hideo Nakamura, Tomoyuki Watanabe, Hirotaka Ohno, Nobuaki Inagaki
  • Publication number: 20090193804
    Abstract: A heat exchanger includes: a cylindrical member made of metal as an outer shell body; a corrugated fin that is made of metal and that is attached to the cylindrical member as a heat exchanging member; and a coating layer formed on at least one of a surface of the cylindrical member and a surface of the corrugated fin. The corrugated fin is pressure-contacted to the cylindrical member. The heat exchanger can be provided, for example, to a heat absorbing portion or a heat dissipating portion of a Stirling engine.
    Type: Application
    Filed: May 13, 2005
    Publication date: August 6, 2009
    Inventors: Hirotaka Ohno, Haruyoshi Noda
  • Patent number: 7168248
    Abstract: A Stirling engine, wherein when a linear motor reciprocatingly move a piston in a cylinder, a displacer also reciprocatingly moves in the cylinder storing the displacer. By this, working mixture moves between a compression space and an expansion space. Though a spring for generating resonance is combined with the displacer, a spring for generating resonance for the piston is eliminated. Gas bearings are installed for the piston at two or more positions at specified intervals in the axial direction. An inside flange formed at the end of the cylinder and a stopper plate fixed to the linear motor determine the moving limit of the piston. Since a pin projected from the stopper plate is received by a through hole in a magnet holder, the piston can be prevented from being rotated.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: January 30, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Jin Sakamoto, Kazushi Yoshimura, Kenji Takai, Shinji Yamagami, Yoshiyuki Kitamura, Hiroshi Yasumura, Hirotaka Ohno
  • Publication number: 20060137339
    Abstract: A Stirling engine, wherein when a linear motor reciprocatingly move a piston in a cylinder, a displacer also reciprocatingly moves in the cylinder storing the displacer. By this, working mixture moves between a compression space and an expansion space. Though a spring for generating resonance is combined with the displacer, a spring for generating resonance for the piston is eliminated. Gas bearings are installed for the piston at two or more positions at specified intervals in the axial direction. An inside flange formed at the end of the cylinder and a stopper plate fixed to the linear motor determine the moving limit of the piston. Since a pin projected from the stopper plate is received by a through hole in a magnet holder, the piston can be prevented from being rotated.
    Type: Application
    Filed: July 20, 2004
    Publication date: June 29, 2006
    Inventors: Jin Sakamoto, Kazushi Yoshimura, Kenji Takai, Shinji Yamagami, Yoshiyuki Kitamura, Hiroshi Yasumura, Hirotaka Ohno
  • Patent number: 6225239
    Abstract: This invention provides a process for accumulating different organic molecular films on oxidized III-V-group compound semiconductor substrates in order to produce a stable, high-quality organic monomolecular film that is three-dimensionally regularly arranged, as well as a process for producing a fine pattern of such organic films. This organic film is formed by immersing a III-V group compound semiconductor substrates in a vessel containing a solution containing phosphonic acid dissolved into a solvent in order to form a self-assembled film, and placing the substrate into a different solution to adsorb metal ions to the surface of the film, or immersing the substrate in a bromide or an acid or alkali solution to denature functional groups, then immersing it in a solution containing organic molecules that are selectively chemically adsorbed to the modified functional groups.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: May 1, 2001
    Assignees: Sharp Kabushiki Kaisha, Agency Industrial Science and Technology
    Inventors: Hirotaka Ohno, Kazushi Fujioka, Mikihiro Yamanaka, Satoko Mitarai, Hiroshi Tokumoto
  • Patent number: 5970381
    Abstract: A method is provided that produces a good, strong organic monomolecular film having its atoms arranged in a three-dimensionally ordered manner by cleaving a III-V group compound semiconductor substrate in film formation molecules or in a solution containing them, in order to cause selective chemisorption which forms a monomolecular film and then deposits another layer of organic molecule film. In this method, the III-V group compound semiconductor substrate is cleaved in a solution containing SH groups dissolved into a solvent in order to form a self-assembled monolayer and is then placed in another solution, where metallic ions are adsorbed to the surface of the film or where the functional groups are converted by chemical treatment. The substrate is then immersed in a solution containing organic molecules that are selectively chemisorbed to the functional groups.
    Type: Grant
    Filed: September 5, 1997
    Date of Patent: October 19, 1999
    Assignee: National Institute for Advanced Interdisciplinary Research
    Inventors: Hirotaka Ohno, Larry A. Nagahara, Hiroshi Tokumoto
  • Patent number: 5942286
    Abstract: The present invention provides a method for selectively allowing film-forming molecules to be chemically adsorbed onto an Si substrate to produce a good and robust organic monomolecular film, wherein molecules with SH groups are chemically adsorbed onto the Si substrate to form a monomolecular film of the molecules by heating an As molecular beam source 4 to allow a monoatomic layer thickness of arsenic to be adsorbed onto the clean surface of the Si substrate set on a sample stage 3 and then immersing the Si substrate terminated by arsenic in a solution containing molecules with SH groups.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: August 24, 1999
    Assignees: Agency of Industrial Science and Technology, Angstrom Technology Partnership, Sharp Corporation
    Inventors: Hirotaka Ohno, Shangjr Gwo, Hiroshi Tokumoto
  • Patent number: 5157055
    Abstract: A cation exchange polyimide resin having resistance to organic solvents which contains polyamidocarboxylic acid units providing sites of ion exchange and represented by the formula (I): ##STR1## wherein R.sup.1 is a tetravalent organic group, and R.sup.2 is a bivalent organic group, which is capable of trapping cations from organic solvents.
    Type: Grant
    Filed: June 4, 1991
    Date of Patent: October 20, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiro Akagi, Koji Ohoka, Shigeru Kaminishi, Hiroshi Taniguchi, Hideo Asahina, Hirotaka Ohno, Mariko Ishino, Atsuhisa Inoue, Yasunari Okamoto, Yoshiharu Nakajima
  • Patent number: 5128007
    Abstract: A method for evaluating a lithium niobate thin film includes measuring an absorption edge wavelength of a lithium niobate thin film and evaluating a lithium-to-niobium composition ratio of the thin film, and an apparatus for preparing a thin film including a thin film-forming body capable of controlling the lithium-to-niobium composition ratio of a lithium niobate thin film being formed and an evaluation device for evaluating the lithium-to-niobium composition ratio, the evaluation device being provided with a monitor substrate, an optical path for spectrometry, an ultraviolet ray source and a measurement part for measuring an absorption edge wavelength of the thin film.
    Type: Grant
    Filed: April 25, 1991
    Date of Patent: July 7, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hironori Matsunaga, Hirotaka Ohno, Yasunari Okamoto
  • Patent number: 4981714
    Abstract: A method of producing a ferroelectric thin film comprising the steps of evaporating metal Li or an oxide thereof as a Li source, metal Nb or an oxide thereof as a Nb source and metal Ta or an oxide thereof as a Ta source in a substantially oxygen gas plasma atmosphere while controlling the respective heating temperatures independently from each other and simultaneously depositing the Li, Nb and Ta on a substrate so as to obtain an LiNb.sub.1-x Ta.sub.x O.sub.3 (0<x<1) thin film which shows ferroelectricity.
    Type: Grant
    Filed: April 30, 1990
    Date of Patent: January 1, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hirotaka Ohno, Hironori Matsunaga, Yasunari Okamoto, Yoshiharu Nakajima