Abstract: [Object] To provide a method for producing an electrical wiring member having a layered structure of copper wiring and a blackening layer and to provide the electrical wiring member through a search for a material for the blackening layer, the material being etched at a rate close to that for the copper wiring under conditions where etching controllability is ensured. [Solution] A method for producing an electrical wiring member according to the present invention includes a step of forming, on at least one main surface of a substrate, a layered film 6 of a Cu layer 3 and CuNO-based blackening layers (2a and 2b); a step of forming a resist layer 4a in a predetermined region on the layered film 6; and a step of removing a partial region of the layered film 6 by bringing the layered film 6 into contact with an etchant.

Abstract: A method for producing a thin film transistor and a thin film transistor that can suppress deterioration and variation in performance are provided. A method for producing a thin film transistor includes: forming an oxide semiconductor layer on a first main surface of a substrate; forming a first conductive layer on the oxide semiconductor layer, while forming a second conductive layer on a second main surface of the substrate; forming mask layers collectively on the first conductive layer and the second conductive layer; and bringing the first conductive layer and the second conductive layer collectively into contact with etching liquid so that partial regions of the first conductive layer and the second conductive layer are removed, so as to form a source electrode and a drain electrode on the oxide semiconductor layer, while forming a gate electrode on the second main surface of the substrate.

Abstract: A method for producing a thin film transistor and a thin film transistor that can suppress deterioration and variation in performance are provided. A method for producing a thin film transistor includes: forming an organic semiconductor layer on a first main surface of a substrate; forming a first conductive layer on the organic semiconductor layer, while forming a second conductive layer on a second main surface of the substrate; forming mask layers collectively on the first conductive layer and the second conductive layer; and bringing the first conductive layer and the second conductive layer collectively into contact with etching liquid so that partial regions of the first conductive layer and the second conductive layer are removed, so as to form a source electrode and a drain electrode on the organic semiconductor layer, while to form a gate electrode on the second main surface of the substrate.

Abstract: [Object] To provide a method for producing an electrical wiring member having a layered structure of copper wiring and a blackening layer and to provide the electrical wiring member through a search for a material for the blackening layer, the material being etched at a rate close to that for the copper wiring under conditions where etching controllability is ensured. [Solution] A method for producing an electrical wiring member according to the present invention includes a step of forming, on at least one main surface of a substrate, a layered film 6 of a Cu layer 3 and CuNO-based blackening layers (2a and 2b); a step of forming a resist layer 4a in a predetermined region on the layered film 6; and a step of removing a partial region of the layered film 6 by bringing the layered film 6 into contact with an etchant.

Abstract: A method of manufacturing a narrow frame touch input sheet having very good anticorrosion properties and suitable for a narrow frame capacitance type touch sensor having a double-layer transparent conductive film pattern.

Abstract: A method of manufacturing a narrow frame touch input sheet having very good anticorrosion properties and suitable for a narrow frame capacitance type touch sensor having a double-layer transparent conductive film pattern.

Abstract: A method of manufacturing a narrow frame touch input sheet having very good anticorrosion properties and suitable for a narrow frame capacitance type touch sensor having a double-layer transparent conductive film pattern. The method uses an electrical conductivity sheet obtained by sequentially forming transparent and light blocking conductive films, and first resist layers, on both sides of a transparent base sheet, exposing and developing the resist layers on both sides simultaneously, etching the transparent and light blocking films simultaneously, removing the resist layers, laminating second resist layers with anticorrosion agent on the revealed light blocking films, etching the light blocking films in center windows and terminal portions to reveal the transparent films, and side etching revealed end faces of the light blocking films at center window and terminal portion boundaries to create visor structured second resist layers that are heat softened as an anticorrosion layer on the revealed faces.

Abstract: A method of manufacturing a narrow frame touch input sheet having very good anticorrosion properties and suitable for a narrow frame capacitance type touch sensor having a double-layer transparent conductive film pattern. The method uses an electrical conductivity sheet obtained by sequentially forming transparent and light blocking conductive films, and first resist layers, on both sides of a transparent base sheet, exposing and developing the resist layers on both sides simultaneously, etching the transparent and light blocking films simultaneously, removing the resist layers, laminating second resist layers with anticorrosion agent on the revealed light blocking films, etching the light blocking films in center windows and terminal portions to reveal the transparent films, and side etching revealed end faces of the light blocking films at center window and terminal portion boundaries to create visor structured second resist layers that are heat softened as an anticorrosion layer on the revealed faces.

Abstract: A TFT array substrate used for a display device and a method of making the same are disclosed. A optically transparent thick resin insulation film 5 is formed on a base substrate and an upper contact hole 51 is perforated through the optically transparent thick resin insulation film 5. A lower contact hole 41 perforated through a gate insulation film 15 and patterning of an ITO film to make a transparent pixel electrode are then collectively carried out under a photoresist pattern 8. Where the photoresist pattern 8 is provided after making the ITO film, an aperture 81 is perforated closer to the center of the upper contact hole 51 at an end portion of a connecting line 14a for a pad and is smaller in diameter by a side etching size plus a margin than the upper contact hole.

Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.

Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.

Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.

Abstract: A circuit array substrate 10 includes pixel and connecting edge sections 80 and 90. Connecting edge section 90 is provided with edge portions 5a and shoulder portions 55 of transparent thin resin film 5 over which terminal pins 101 of tape carrier packages (TCP) 100 are disposed. Terminal pins 101 are connected to connecting pads 14 at their contact portions 103. Shoulder portions 55 prevent a coated photoresist film from being excessive in depth and residues of the photoresist film from being left in the foot of edge face 5a in the step of forming metal reflective pixel electrodes. Thus, no residue of the metal film exists after its etching treatment in that step so that no electrical short circuits are caused between connecting pads 14 and adjacent terminal pins 101.

Abstract: A TFT array substrate used for a display device and a method of making the same are disclosed. A optically transparent thick resin insulation film 5 is formed on a base substrate and an upper contact hole 51 is perforated through the optically transparent thick resin insulation film 5. A lower contact hole 41 perforated through a gate insulation film 15 and patterning of an ITO film to make a transparent pixel electrode are then collectively carried out under a photoresist pattern 8. Where the photoresist pattern 8 is provided after making the ITO film, an aperture 81 is perforated closer to the center of the upper contact hole 51 at an end portion of a connecting line 14a for a pad and is smaller in diameter by a side etching size plus a margin than the upper contact hole.