Patents by Inventor Hiroto IIDA
Hiroto IIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240227377Abstract: Provided is a method for manufacturing a laminate that is excellent in adhesion between the copper foil and the resin film while using a polyvinyl acetal resin having low reactivity with the copper foil. This method includes the steps of providing a copper foil having on at least one side a treated surface on which an amount of metal components is 30 atomic % or more and 40 atomic % or less, and attaching or forming a polyvinyl acetal resin film on the treated surface of the copper foil to form a laminate. The amount of metal components is a proportion of Cr, Ni, Cu, Zn, Mo, Co, W, and Fe in a total amount of N, O, Si, P, S, Cl, Cr, Ni, Cu, Zn, Mo, Co, W, and Fe when the treated surface is subjected to elemental analysis by X-ray photoelectron spectroscopy (XPS).Type: ApplicationFiled: February 8, 2022Publication date: July 11, 2024Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Hiroto IIDA, Makoto HOSOKAWA, Misato MIZOGUCHI, Shinya HIRAOKA, Toshiyuki SHIMIZU
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Patent number: 12004304Abstract: There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 ?m thick having a surface having an arithmetic mean waviness Wa of 0.10 ?m or more and 0.25 ?m or less as measured in accordance with JIS B0601-2001 and a kurtosis Sku of 2.0 or more and 3.5 or less as measured in accordance with ISO 25178; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.Type: GrantFiled: March 17, 2020Date of Patent: June 4, 2024Assignee: MITSUI MINING & SMELTING CO., LTD.Inventors: Yoshinori Shimizu, Hiroto Iida, Misato Mizoguchi, Akitoshi Takanashi, Makoto Hosokawa
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Publication number: 20240131832Abstract: Provided is a method for manufacturing a laminate that is excellent in adhesion between the copper foil and the resin film while using a polyvinyl acetal resin having low reactivity with the copper foil. This method includes the steps of providing a copper foil having on at least one side a treated surface on which an amount of metal components is 30 atomic % or more and 40 atomic % or less, and attaching or forming a polyvinyl acetal resin film on the treated surface of the copper foil to form a laminate. The amount of metal components is a proportion of Cr, Ni, Cu, Zn, Mo, Co, W, and Fe in a total amount of N, O, Si, P, S, Cl, Cr, Ni, Cu, Zn, Mo, Co, W, and Fe when the treated surface is subjected to elemental analysis by X-ray photoelectron spectroscopy (XPS).Type: ApplicationFiled: February 8, 2022Publication date: April 25, 2024Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Hiroto IIDA, Makoto HOSOKAWA, Misato MIZOGUCHI, Shinya HIRAOKA, Toshiyuki SHIMIZU
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Publication number: 20240123707Abstract: Provided is a method for manufacturing a laminate that is excellent in adhesion between a copper foil and a resin film while using a polyvinyl acetal resin having low reactivity with the copper foil. This method includes the steps of providing a copper foil having a treated surface having a developed interfacial area ratio Sdr of 0.50% or more and 9.00% or less and a root mean square height Sq of 0.010 ?m or more and 0.200 ?m or less on at least one side, and attaching or forming a polyvinyl acetal resin film on the treated surface of the copper foil to form a laminate. The Sdr and Sq are values measured in accordance with ISO 25178 under conditions in which a cutoff wavelength of an S-filter is 0.55 ?m, and a cutoff wavelength of an L-filter is 10 ?m.Type: ApplicationFiled: February 8, 2022Publication date: April 18, 2024Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Hiroto IIDA, Makoto HOSOKAWA, Misato MIZOGUCHI, Shinya HIRAOKA, Toshiyuki SHIMIZU
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Publication number: 20220192029Abstract: There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 ?m thick having a surface having an arithmetic mean waviness Wa of 0.10 ?m or more and 0.25 ?m or less as measured in accordance with JIS B0601-2001 and a kurtosis Sku of 2.0 or more and 3.5 or less as measured in accordance with ISO 25178; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.Type: ApplicationFiled: March 17, 2020Publication date: June 16, 2022Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Yoshinori SHIMIZU, Hiroto IIDA, Misato MIZOGUCHI, Akitoshi TAKANASHI, Makoto HOSOKAWA
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Publication number: 20220183158Abstract: There is provided a method for manufacturing a printed wiring board that effectively suppresses pattern failure and is also excellent in fine circuit forming properties. This method includes: providing an insulating substrate including a roughened surface; performing electroless plating on the roughened surface of the insulating substrate to form an electroless plating layer less than 1.0 ?m thick having a surface having an arithmetic mean waviness Wa of 0.10 ?m or more and 0.25 ?m or less and a valley portion void volume Vvv of 0.010 ?m3/?m2 or more and 0.028 ?m3/?m2 or less; laminating a photoresist on the surface of the electroless plating layer; performing exposure and development to form a resist pattern; applying electroplating to the electroless plating layer; stripping the resist pattern; and etching away an unnecessary portion of the electroless plating layer to form a wiring pattern.Type: ApplicationFiled: March 17, 2020Publication date: June 9, 2022Applicant: MITSUI MINING & SMELTING CO., LTD.Inventors: Yoshinori SHIMIZU, Hiroto IIDA, Misato MIZOGUCHI, Akitoshi TAKANASHI, Makoto HOSOKAWA
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Patent number: 9338898Abstract: A method-of producing a printed wiring board comprises: forming a via-hole for interlayer connection in a laminate in which a copper foil for laser processing comprises a copper foil and an easily soluble laser absorption layer provided on a surface of the copper foil which has a higher etching rate to a copper etchant than the copper foil and absorbs an infrared laser beam and another conductor layer is laminated through an insulating layer, directly irradiating the infrared laser beam on the easily soluble laser absorption layer; and removing the easily soluble laser absorption layer from the surface of the copper foil in a desmear step of removing a smear in a via-hole and/or a microetching step as a pretreatment of an electroless plating step is adopted.Type: GrantFiled: March 5, 2013Date of Patent: May 10, 2016Assignee: MITSUI MINING & SMELTING CO., LTD.Inventors: Joji Fujii, Hiroaki Tsuyoshi, Hiroto Iida, Kazuhiro Yoshikawa, Mitsuyoshi Matsuda
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Patent number: 9144157Abstract: Object of the present invention is to provide a method for manufacturing a printed wiring board which enables fine wiring formation at low costs and with high yields without introducing any special equipment, and a printed wiring board manufactured by the method.Type: GrantFiled: July 28, 2011Date of Patent: September 22, 2015Assignee: MITSUI MINING & SMELTING CO., LTD.Inventor: Hiroto Iida
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Publication number: 20130247373Abstract: An object of the present invention is to provide a method of producing a printed wiring board which reduces production steps, is excellent in infrared laser processability, and is suitable for formation of an excellent wiring pattern; and to provide a copper foil for laser processing and a copper-clad laminate.Type: ApplicationFiled: March 5, 2013Publication date: September 26, 2013Inventors: Joji FUJII, Hiroaki TSUYOSHI, Hiroto IIDA, Kazuhiro YOSHIKAWA, Mitsuyoshi MATSUDA
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Publication number: 20130213701Abstract: Object of the present invention is to provide a method for manufacturing a printed wiring board which enables fine wiring formation at low costs and with high yields without introducing any special equipment, and a printed wiring board manufactured by the method.Type: ApplicationFiled: July 28, 2011Publication date: August 22, 2013Applicant: MITSUI MINING & SMELTING CO., LTD.Inventor: Hiroto IIDA