Patents by Inventor Hirotomo Miura

Hirotomo Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6800911
    Abstract: A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon film, and a high melting-point metal film formed on the silicide film. The silicon film has a non-doped layer, which does not contain impurities, and an impurity layer which is formed on the non-doped layer and contains impurities. The silicide film is formed on the impurity layer of the silicon film.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 5, 2004
    Assignee: United Microelectronics Corporation
    Inventor: Hirotomo Miura
  • Patent number: 6649542
    Abstract: A method of writing data into a memory cell of a non-volatile semiconductor memory device includes setting a write voltage applied to portions of the memory cells depending upon a value of write data, and applying, to a gate electrode, a voltage by which an electric charge is allowed to tunnel through an insulating film on a lower side of a dialectric film that captures the electric charge corresponding to a data value. The amount of electric charge captured is easily and reliably adjusted in order to store desired multi-value digital data, while preventing occurrence of data corruption.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: November 18, 2003
    Assignee: Nippon Steel Corporation
    Inventors: Hirotomo Miura, Yasuo Sato
  • Publication number: 20030205769
    Abstract: A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon film, and a high melting-point metal film formed on the silicide film. The silicon film has a non-doped layer, which does not contain impurities, and an impurity layer which is formed on the non-doped layer and contains impurities. The silicide film is formed on the impurity layer of the silicon film.
    Type: Application
    Filed: May 30, 2003
    Publication date: November 6, 2003
    Applicant: United Microelectronics Corporation
    Inventor: Hirotomo Miura
  • Patent number: 6605839
    Abstract: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: August 12, 2003
    Assignee: Nippon Steel Corporation
    Inventors: Hirotomo Miura, Yasuo Sato
  • Patent number: 6596590
    Abstract: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: July 22, 2003
    Assignee: Nippon Steel Corporation
    Inventors: Hirotomo Miura, Yasuo Sato
  • Patent number: 6596567
    Abstract: A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon film, and a high melting-point metal film formed on the silicide film. The silicon film has a non-doped layer, which does not contain impurities, and an impurity layer which is formed on the non-doped layer and contains impurities. The silicide film is formed on the impurity layer of the silicon film.
    Type: Grant
    Filed: November 14, 2000
    Date of Patent: July 22, 2003
    Assignee: United Microelectronics Corporation
    Inventor: Hirotomo Miura
  • Patent number: 6469343
    Abstract: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: October 22, 2002
    Assignee: Nippon Steel Corporation
    Inventors: Hirotomo Miura, Yasuo Sato
  • Publication number: 20020145161
    Abstract: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode.
    Type: Application
    Filed: May 17, 2002
    Publication date: October 10, 2002
    Inventors: Hirotomo Miura, Yasuo Sato
  • Patent number: 6285596
    Abstract: A nonvolatile semiconductor memory device having nonvolatile memory cells, each of said memory cells including a semiconductor substrate of one type of electric conduction, a pair of source and drain regions of the opposite type of electric conduction formed in the semiconductor substrate, an electric charge-capturing film formed on a channel region between the pair of source and drain regions, and a gate electrode formed on the charge-capturing film and working as a control electrode.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: September 4, 2001
    Assignee: Nippon Steel Corporation
    Inventors: Hirotomo Miura, Yasuo Sato
  • Patent number: 6208003
    Abstract: A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon film, and a high melting-point metal film formed on the silicide film. The silicon film has a non-doped layer, which does not contain impurities, and an impurity layer which is formed on the non-doped layer and contains impurities. The silicide film is formed on the impurity layer of the silicon film.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: March 27, 2001
    Assignee: Nippon Steel Corporation
    Inventor: Hirotomo Miura
  • Patent number: 5932917
    Abstract: An input protective circuit includes a resistance element for connecting the input terminal and internal circuit of a semiconductor integrated circuit, and a field effect transistor for discharging a surge input to the ground potential. Adjacent diffusion layer regions consisting of a diffusion resistance layer corresponding to the resistance element and an impurity diffusion layer corresponding to the drain or source of the field effect transistor and connected adjacent to each other are formed by double diffusion using ion implantation.
    Type: Grant
    Filed: April 10, 1997
    Date of Patent: August 3, 1999
    Assignee: Nippon Steel Corporation
    Inventor: Hirotomo Miura