Abstract: An imaging apparatus is provided that includes a liquid discharge head configured to discharge recording liquid as one or more recording liquid droplets; a drive waveform generating unit configured to generate a drive waveform including at least two drive signals within one printing period; a drive unit configured to input tone data, select a relevant drive signal from the drive waveform via a switch that switches on/off according to the tone data, and apply the selected drive signal to the liquid discharge head; and a transmitting unit configured to transmit the tone data to the drive unit plural times within one printing period, the tone data being configured at a plurality of bits per channel.

Abstract: An imaging apparatus is provided that includes a liquid discharge head configured to discharge recording liquid as one or more recording liquid droplets; a drive waveform generating unit configured to generate a drive waveform including at least two drive signals within one printing period; a drive unit configured to input tone data, select a relevant drive signal from the drive waveform via a switch that switches on/off according to the tone data, and apply the selected drive signal to the liquid discharge head; and a transmitting unit configured to transmit the tone data to the drive unit plural times within one printing period, the tone data being configured at a plurality of bits per channel.

Abstract: A recording head is provided with a plurality of nozzles for ejecting a fluid, a plurality of pressure-applied chambers arranged in a predetermined direction and each communicating with a corresponding one of the nozzles, and a common chamber having a plurality of wall surfaces and configured to supply the fluid to the pressure-applied chambers. At least one of the wall surfaces of the common chamber, along the predetermined direction, has a pressure absorbing surface with a rigidity lower than those of other wall surfaces and configured to absorb a pressure change, and the pressure absorbing surface is formed by a pressure absorbing member having a non-uniform thickness.

Abstract: A recording head is provided with a plurality of nozzles for ejecting a fluid, a plurality of pressure-applied chambers arranged in a predetermined direction and each communicating with a corresponding one of the nozzles, and a common chamber having a plurality of wall surfaces and configured to supply the fluid to the pressure-applied chambers. At least one of the wall surfaces of the common chamber, along the predetermined direction, has a pressure absorbing surface with a rigidity lower than those of other wall surfaces and configured to absorb a pressure change, and the pressure absorbing surface is formed by a pressure absorbing member having a non-uniform thickness.

Abstract: A liquid drop jet head includes a nozzle, a liquid room, a vibration board forming a wall surface of the liquid room, driving element, a support substrate to which an end part of the driving element is connected without connecting to the vibration board, and a gap between the support substrate and the vibration board at a position corresponding to a partition of the liquid room, wherein the vibration board includes a thin part and a thick part and the area of the thin part is divided by the thick part with which the driving element comes in contact.

Abstract: A liquid drop jet head includes a nozzle, a liquid room, a vibration board forming a wall surface of the liquid room, driving means, a support substrate to which an end part of the driving means is connected without connecting to the vibration board, and a gap between the support substrate and the vibration board at a position corresponding to a partition of the liquid room, wherein the vibration board comprises a thin part and a thick part and the area of the thin part is divided by the thick part with which the driving means comes in contact.

Abstract: An inkjet recording apparatus has an inkjet head for ejecting a droplet of ink from a nozzle. The inkjet head includes an electrostatic actuator and a diaphragm which are arranged such that the diaphragm is prevented from being destroyed due to an excessive stress or fatigue. A constant amount of displacement of the diaphragm can be achieved even when a voltage fluctuation occurs. The diaphragm is elastically deformable by an electrostatic force. An electrode faces the diaphragm with a predetermined air gap therebetween so as to generate the electrostatic force. The electrode has a width smaller than a width of the diaphragm at all points along a longitudinal direction of the electrode. The electrode is situated under the diaphragm and arranged such that when the electrode is vertically projected onto the diaphragm, the projected electrode is situated within the diaphragm in a direction of the width of the electrode.

Abstract: A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

Abstract: A hierarchical signal processing apparatus includes aggregates having logic operation portions. The apparatus compares a final output signal from a logic operation portion in a final aggregate with a teaching signal, and generates an error signal by taking a signal which exists only in the teaching signal as a positive error signal, and taking a signal which exists only in said final output signal as a negative error signal.

Abstract: A neuron unit includes first shift registers for storing first weighting coefficients; second shift registers for storing second weighting coefficients; a first gate circuit for obtaining first logical products of first binary input signals and the first weighting coefficients; a second gate circuit for obtaining second logical products of second binary input signals and the second weighting coefficients; a third gate circuit for obtaining a logical sum of the first logical products, and for outputting a first binary response signal corresponding to the logical sum; a fourth gate circuit for obtaining a logical sum of the second logical products, and for outputting a second binary response signal corresponding to the logical sum; a signal generator for outputting a binary signal; and an output circuit for outputting a binary output signal, the first binary response signal being used as the binary output signal when values of the first and second binary response signals differ from each other, and the binary s

Abstract: A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on an error signal representing an error between the output signal of the forward process part and a teaching signal and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The error signal includes first and second error signal components representing pulse densities.

Abstract: A neuron unit simultaneously processes a plurality of binary input signals.

Abstract: A signal processing apparatus for controlling an object includes an input unit, a neural network, an output unit, a teaching unit, and an error signal generator for generating a teaching signal that makes the neural network learn in real time. An error signal generator generates an error signal from the teaching signal and information contained in the network output signal. The error signal controls the neural network so that the control output signal has correct control information with respect to the output signal from the controlled object.

Abstract: A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

Abstract: A neuron unit processes a plurality of input signals and for outputs an output signal which is indicative of a result of the processing, and includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a function generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part. The supplying part includes a memory for storing each weight function in the form of a binary value, and a generating circuit for generating a random pulse train based on each binary value stored in the memory.

Abstract: A neuron unit processes a plurality of binary input signals and outputs a neuron output signal which is indicative of a result of the processing. The neuron unit is provided with a plurality of first gates respectively for carrying out a logical operation on a binary input signal and a weighting coefficient, a second gate for carrying out a logical operation on an excitatory output signal of each of the first gates, a third gate for carrying out a logic operation on an inhibitory output signal of each of the first gates, a fourth gate for synthesizing output signals of the second and third gates and outputting the neuron output signal, and a generating circuit for generating the weighting coefficients which are supplied to each of the first gates.

Abstract: A method and apparatus are disclosed that modify [ies] and generalize [s] the use in artificial neural networks of the error backpropagation algorithm. Each neuron unit first divides a plurality of weighted inputs into more than one group, then sums up weighted inputs in each group to provide each group's intermediate outputs, and finally processes the intermediate outputs to produce an output of the neuron unit. Since the method uses, when modifying each weight, a partial differential coefficient generated by partially-differentiating the output of the neuron unit by each weighted input, the weight can be properly modified even if the output of a neuron unit as a function of intermediate outputs has a plurality of variables corresponding to the number of groups.

Abstract: A neuron unit includes first shift registers for storing first weighting coefficients; second shift registers for storing second weighting coefficients; a first gate circuit for obtaining first logical products of first binary input signals and the first weighting coefficients; a second gate circuit for obtaining second logical products of second binary input signals and the second weighting coefficients; a third gate circuit for obtaining a logical sum of the first logical products, and for outputting a first binary response signal corresponding to the logical sum; a fourth gate circuit for obtaining a logical sum of the second logical products, and for outputting a second binary response signal corresponding to the logical sum; a signal generator for outputting a binary signal; and an output circuit for outputting a binary output signal, the first binary response signal being used as the binary output signal when values of the first and second binary response signals differ from each other, and the binary s

Abstract: A signal processing apparatus for controlling an object includes an input unit, a neural network, an output unit, a teaching unit, and an error signal generator for generating a teaching signal that makes the neural network learn in real time. An error signal generator generates an error signal from the teaching signal and information contained in the network output signal. The error signal controls the neural network so that the control output signal has correct control information with respect to the output signal from the controlled object.

Abstract: A neuron unit simultaneously processes a plurality of binary input signals.