Abstract: A semiconductor device includes a heavily doped layer 25 of p-type formed in the surface of an n-type well 21, an intermediately doped layer 26 of p-type formed to adjoin and surround the heavily p-doped layer 25, and an isolation region 22 formed to surround the heavily p-doped layer 25 and the intermediately p-doped layer 26. The heavily p-doped layer 25 has a higher dopant concentration than the well 21. The intermediately p-doped layer 26 has a higher dopant concentration than the well 21 and a lower dopant concentration than the heavily p-doped layer 25.

Abstract: A semiconductor device comprises a heavily doped layer 25 of p-type formed in the surface of an n-type well 21, an intermediately doped layer 26 of p-type formed to adjoin and surround the heavily p-doped layer 25, and an isolation region 22 formed to surround the heavily p-doped layer 25 and the intermediately p-doped layer 26. The heavily p-doped layer 25 has a higher dopant concentration than the well 21. The intermediately p-doped layer 26 has a higher dopant concentration than the well 21 and a lower dopant concentration than the heavily p-doped layer 25.

Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.

Abstract: A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PN junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion layer 15 formed on a surface of a certain-conductivity-type semiconductor substrate or well, the impurity diffusion layer having a conductivity opposite to that of the semiconductor substrate or well, and a device separating insulation film 12 formed at a distance from the impurity diffusion layer, and a distance between an end of the impurity diffusion layer and an end of the device separating insulation film is defined to be not less than 1.2 &mgr;m.

Abstract: A semiconductor device providing an improved effect of suppressing variation with time of reverse breakdown voltage applied to PH junction, particularly, a voltage-regulator device, is provided. The semiconductor device includes an impurity diffusion layer 15 formed on a surface of a certain-conductivity-type semiconductor substrate or well, the impurity diffusion layer having a conductivity opposite to that of the semiconductor substrate or well, and a device separating insulation film 12 formed at a distance from the impurity diffusion layer, and a distance between an end of the impurity diffusion layer and an end of the device separating insulation film is defined to be not less than 1.2 &mgr;m.

Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.

Abstract: A field oxide surrounding an active region, an N-type doped layer formed in the active region, and an electrode formed on the field oxide in the vicinity of the active region are provided on a P-type semiconductor substrate. During the operation as a constant voltage device, a desired voltage is applied to the electrode. Then, trapping of carriers in the interface between the field oxide and the semiconductor region can be suppressed, although such trapping is ordinarily caused by a reverse breakdown phenomenon at the pn junction between the doped layer and the P-type semiconductor substrate. Accordingly, the variation in strength of the electric field between the doped layer and the semiconductor substrate can be suppressed. As a result, it is possible to suppress a variation in reverse withstand voltage, which is usually caused by a reverse breakdown voltage at a pn junction, for a semiconductor device functioning as a constant voltage device.

Abstract: In a semiconductor integrated circuit device having a high breakdown voltage CMOS transistor integrated for programming a programmable element, the present invention is intended to solve a problem of the drain breakdown voltage of the high breakdown voltage transistor going low as a result of a structure that the standard transistor and the high breakdown voltage transistor share common channel dope region. On a P-type monocrystal silicon substrate of 10-20 .OMEGA.cm specific resistivity having a P-well region and a silicon oxide film for separating the elements, a channel dope region for an insulated-gate type field effect transistor A and a channel dope region for an insulated-gate type field effect transistor B are formed separately, making the impurity concentration in one channel dope region two to ten times as high as that in the other channel dope region.

Abstract: The present invention relates to the method of manufacturing an antifuse element having an antifuse layer formed between interconnection layers. Conventionally, an antifuse layer was formed after an aperture was formed through an interlayer insulating film. Such resulted in a thinner film thickness at the corner formed by inner wall surface of the aperture and a lower electrode layer. As it is very difficult to control the film thickness of the thinnest part to a specific value, control of the insulation breakdown voltage in "off" state was difficult. The present antifuse element includes a layer with a flat shape of an even thickness. The layer is a complexed film of amorphous silicon film, silicon nitride film and silicon oxide film. The antifuse electrode layer is of a titanium nitride, the film thickness of which is thicker than the invasion length of a fuse link into electrode layers.

Abstract: A programmable device to which information can be electrically written to, and can store the information, even after power is cut off is disclosed. The programmable device has a lower electrode, an insulating layer formed on the lower electrode, and an upper electrode formed on the insulating layer. The insulating layer has two window regions having a thickness thinner than a region surrounding the window regions. The upper electrode is formed in such a way as to bridge between the two adjacent window regions. The size of programmable regions where the upper electrode overlaps the window regions is made smaller than the minimum feature size defined by resolution of lithography. Further, the total area of the two program regions remains unchanged despite misalignment of masks during the lithography process.

Abstract: A programmable device to which information can be electrically written to, and can store the information, even after power is cut off is disclosed. The programmable device has a lower electrode, an insulating layer formed on the lower electrode, and an upper electrode formed on the insulating layer. The insulating layer has two window regions having a thickness thinner than a region surrounding the window regions. The upper electrode is formed in such a way as to bridge between the two adjacent window regions. The size of programmable regions where the upper electrode overlaps the window regions is made smaller than the minimum feature size defined by resolution of lithography. Further, the total area of the two program regions remains unchanged despite misalignment of masks during the lithography process.