Abstract: A gradation voltage generation circuit includes a plurality of serially-connected grayscale resistors. The grayscale resistors produce a plurality of gradation voltages. Based on correction information, a width of a selected grayscale resistor is changed without changing a length of the resistor. As a result, the width of the resistor is different from that of a non-selected grayscale resistor.

Abstract: With respect to gate wires 34P arranged in a P-ROM decoder 216P, two confronting gate wires 34P to which one bit of a digital signal representing a gradation level is input with being non-inverted or inverted are paired, and the width of the gate wire that contains the upper portion of the depletion type transistor 2P (kept under ON-state at all times) and from the depletion type transistor 2P until the enhancement type transistors 1P adjacent to the depletion type transistor 2P is set to a half of the gate wire width L on the transistor 1P inside the gate wires 34P.

Abstract: With respect to gate wires 34P arranged in a P-ROM decoder 216P, two confronting gate wires 34P to which one bit of a digital signal representing a gradation level is input with being non-inverted or inverted are paired, and the width of the gate wire that contains the upper portion of the depletion type transistor 2P (kept under ON-state at all times) and from the depletion type transistor 2P until the enhancement type transistors 1P adjacent to the depletion type transistor 2P is set to a half of the gate wire width L on the transistor 1P inside the gate wires 34P.

Abstract: An initial layer of an epitaxial layer is formed on an n+ type semiconductor substrate in which a crystal plane of a substrate surface is (100) plane and a crystal plane of its orientation flat is {100} plane. Then, a silicon oxide film having a film thickness of 400 to 600 Å is formed on a surface of the initial layer by thermal oxidization, and a silicon nitride film which functions as a mask for preventing the growth of oxide film and has a film thickness of 600 to 1000 Å is allowed to grow on the silicon oxide film by CVD process and then, is selectively dry etched to form an n− type epitaxial layer in which an initial groove is formed. Next, an inner surface of the groove is thermally oxidized at the oxidization temperature of 1100 to 1200° C. using the nitride film as a mask, and if an LOCOS oxide film having a film thickness of 0.6 to 0.8 &mgr;m is formed, the initial groove becomes a U-shaped groove.