Patents by Inventor Hiroyasu Enjou

Hiroyasu Enjou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8330752
    Abstract: A data line driving circuit for a display panel includes a plurality of output circuits, a bias circuit, and a plurality of switches. Each of the plurality of output circuits includes an electric current source which supplies electric current in response to a bias signal, and supplies a data voltage by using the electric current to a corresponding one of a plurality of data lines arranged in the display panel. The bias circuit generates the bias signal, and supplies the bias signal to the plurality of output circuits through bias wirings. The plurality of switches is provided between the bias circuit and the plurality of output circuits, and cuts off the bias wirings in response to a control signal.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 11, 2012
    Assignee: RENESAS Electronics Corporation
    Inventor: Hiroyasu Enjou
  • Publication number: 20120092322
    Abstract: A liquid crystal display drive circuit includes first and second buffer circuits, first to fourth switches, and a control signal generation circuit (CSGC). The first buffer circuit drives a first or second data line, and the second buffer circuit drives the second or first data line. Closing the first switch makes the first buffer circuit drive the first data line responsive to a first control signal. Closing the second switch makes the second buffer circuit drive the second data line. Closing the third switch makes the first buffer circuit drive the second data line in responsive to a second control signal. Closing the fourth switch is makes the second buffer circuit drive the first data line. The CSGC generates the first-third control signals for causing respective outputs of the first buffer circuit, and the second buffer circuit to be in high impedance state on the basis of a strobe signal.
    Type: Application
    Filed: October 6, 2011
    Publication date: April 19, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroyasu ENJOU, Hirokazu KAWAGOSHI
  • Patent number: 8089438
    Abstract: A data line driver circuit includes a D/A converter circuit including a first gradation voltage selecting circuit controlling transistors of a first group to select a gradation voltage of a first polarity based on a first display data. A second gradation voltage selecting circuit controls transistors of a second group to select a gradation voltage of a second polarity based on second display data. A first gradation voltage signal line transfers the first polarity gradation voltage and a second gradation voltage signal line transfers the second polarity gradation voltage. A test switching circuit operates in response to a test signal to form a short-circuit between the first and second gradation voltage signal lines, to allow a leakage current to be measured between a drain and a source in each of at least one transistor of the first group and at least one transistor of the second group.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: January 3, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroyasu Enjou
  • Publication number: 20110227905
    Abstract: A driver includes a digital-to-analog converter configured to perform digital-to-analog conversion on digital gray scale data to output an analog output gray scale voltage; an output amplifier section having a first input connected with an output of the digital-to-analog converter, and an output connected with an output node, and a second input connected with the output of the output amplifier section through a negative feedback wiring, and configured to output the output gray scale voltage to the output node in response to a control signal in an operation mode. A test switch is connected between the first input and the second input in the output amplifier section and is configured to output the output gray scale voltage to the output node in response to a test signal in a test mode for a test of an output of the digital-to-analog converter.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 22, 2011
    Inventor: Hiroyasu ENJOU
  • Publication number: 20090167745
    Abstract: A data line driving circuit for a display panel includes a plurality of output circuits, a bias circuit, and a plurality of switches. Each of the plurality of output circuits includes an electric current source which supplies electric current in response to a bias signal, and supplies a data voltage by using the electric current to a corresponding one of a plurality of data lines arranged in the display panel. The bias circuit generates the bias signal, and supplies the bias signal to the plurality of output circuits through bias wirings. The plurality of switches is provided between the bias circuit and the plurality of output circuits, and cuts off the bias wirings in response to a control signal.
    Type: Application
    Filed: December 11, 2008
    Publication date: July 2, 2009
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hiroyasu Enjou
  • Publication number: 20080211835
    Abstract: A data line driver circuit for a display panel includes a digital-to-analog (D/A) converter circuit. The D/A converter circuit includes a first gradation voltage selecting circuit configured to control transistors of a first group to select one of gradation voltages of a first polarity based on a first display data; a second gradation voltage selecting circuit configured to control transistors of a second group to select one of gradation voltages of a second polarity based on a second display data; a first gradation voltage signal line configured to transfer the first polarity gradation voltage selected by the first gradation voltage selecting circuit; a second gradation voltage signal line configured to transfer the second polarity gradation voltage selected by the second gradation voltage selecting circuit; and a test switching circuit configured to operate in response to a test signal.
    Type: Application
    Filed: February 27, 2008
    Publication date: September 4, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Hiroyasu Enjou