Patents by Inventor Hiroyasu Morikawa
Hiroyasu Morikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240090222Abstract: A semiconductor memory device includes a stacked body in which a first insulating layer and a first conductive layer are alternately stacked in a first direction. A columnar body includes a first insulating portion extending in the first direction in the stacked body, a first semiconductor portion provided between the first insulating portion and the stacked body, and a third insulating portion provided between a second insulating portion provided between the first semiconductor portion and the stacked body, and the second insulating portion and the stacked body, and has a first end and a second end opposite to the first end. A second conductive layer is provided on the stacked body and is electrically connected to the first semiconductor portion at the first end of the columnar body.Type: ApplicationFiled: September 1, 2023Publication date: March 14, 2024Inventors: Tatsufumi HAMADA, Yosuke MITSUNO, Tomohiro KUKI, Yusuke MORIKAWA, Ryouji MASUDA, Hiroyasu SATO
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Patent number: 10056787Abstract: The rectifier circuit includes: three terminals A, K, VR; voltage comparator including a positive input terminal, a negative input terminal, and a comparative output terminal; current switching unit including source terminal, drain terminal, and control terminal; first switching unit that conducts or cuts off between source terminal and control terminal of the current switching unit; second switching unit that conducts or cuts off between control terminal of the current switching unit and terminal VR; and reference voltage generator that uses terminal A and terminal VR as input terminals, and includes a voltage output terminal.Type: GrantFiled: October 21, 2016Date of Patent: August 21, 2018Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventor: Hiroyasu Morikawa
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Publication number: 20170040842Abstract: The rectifier circuit includes: three terminals A, K, VR; voltage comparator including a positive input terminal, a negative input terminal, and a comparative output terminal; current switching unit including source terminal, drain terminal, and control terminal; first switching unit that conducts or cuts off between source terminal and control terminal of the current switching unit; second switching unit that conducts or cuts off between control terminal of the current switching unit and terminal VR; and reference voltage generator that uses terminal A and terminal VR as input terminals, and includes a voltage output terminal.Type: ApplicationFiled: October 21, 2016Publication date: February 9, 2017Inventor: HIROYASU MORIKAWA
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Patent number: 9173634Abstract: A fatty tissue image display device includes a light source, an ultrasonic wave transmission/reception mechanism, an analysis unit which calculates a velocity change of ultrasonic waves after irradiation with a heating beam as compared to before irradiation with light, a display control unit which displays the distribution of the calculated velocity change of the ultrasonic waves, a designation unit which waits for the designation of a region of interest, a histogram calculation unit which, based on luminance information or color information within the designated region of interest, calculates the histograms of a fatty region showing a negative velocity change of the ultrasonic waves and a normal region showing a positive velocity change of the ultrasonic waves, and an index calculation unit which, from the calculated histograms of the fatty and normal regions, calculates a fatty change index that is an index of a proportion of fatty tissue.Type: GrantFiled: March 25, 2011Date of Patent: November 3, 2015Assignees: OSAKA PREFECTURE UNIVERSITY PUBLIC CORPORATION, ADVANTEST CORPORATIONInventors: Toshiyuki Matsunaka, Hiromichi Horinaka, Hiroyasu Morikawa, Tomohiro Ogawa
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Publication number: 20150257701Abstract: A body fat diagnostic apparatus, with which a change in the velocity of ultrasonic waves can be measured and fat can be diagnosed while suppressing the effects of a periodical change due to respiration and heartbeats of a subject, is formed of: a process unit for sequentially acquiring ultrasonic wave echo signals for a number of frames so as to form a group of B mode images; a data storage unit for storing the ultrasonic wave echo signals corresponding to the groups of B mode images; a sampling unit for sampling one frame as a standard image and another frame as a comparative image through the calculation of a cross correlation; and a velocity change analyzing unit for forming an image by calculating a change in the velocity of ultrasonic waves on the basis of the ultrasonic wave echo signals corresponding to the standard image and the comparative image.Type: ApplicationFiled: February 26, 2015Publication date: September 17, 2015Inventors: Hiromichi HORINAKA, Hiroyasu MORIKAWA
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Publication number: 20150257740Abstract: A body fat diagnostic apparatus with which fat can be diagnosed safely is provided even in the case where a deep portion of the living body is diagnosed or there are bone tissues outside the measurement region. The body fat diagnostic apparatus is formed of: a probe 2 for emitting ultrasonic waves both for applying heat and for diagnosis; and an ultrasonic wave velocity change analyzing unit 15 for calculating the change in the velocity of ultrasonic waves in the measurement region on the basis of the ultrasonic wave echo signals acquired from the region before and after the application of heat using the probe 2, so that fat is diagnosed on the basis of the calculated change in the velocity of ultrasonic waves.Type: ApplicationFiled: February 27, 2015Publication date: September 17, 2015Inventors: Hiromichi HORINAKA, Hiroyasu MORIKAWA, Taiichiro IDA
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Patent number: 8534847Abstract: Disclosed herein is a projector for projecting an image to a screen, including: a lamp configured to emit light; an elliptic reflecting mirror configured to reflect and condense the light from the lamp; a sensor configured to detect the amount of the light reflected and condensed by the elliptic reflecting mirror; a lamp power supply configured to supply power to the lamp to drive the lamp; and a control circuit configured to successively increase the power to be supplied from the lamp power supply to the lamp until after a variation value of the amount of the reflected light detected by the sensor becomes equal to or lower than a predetermined threshold value.Type: GrantFiled: February 11, 2008Date of Patent: September 17, 2013Assignee: Sony CorporationInventors: Toshiyuki Shirasu, Daizo Oka, Hiroyasu Morikawa
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Publication number: 20130018262Abstract: Provided is a fatty tissue image display device capable of displaying an index indicating the degree of progress of fatty change.Type: ApplicationFiled: March 25, 2011Publication date: January 17, 2013Applicants: ADVANTEST CORPORATION, OSAKA PREFECTURE UNIVERSITY PUBLIC CORPORATIONInventors: Toshiyuki Matsunaka, Hiromichi Horinaka, Hiroyasu Morikawa, Tomohiro Ogawa
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Patent number: 8350619Abstract: A current-mode filter includes a first, a second, and a third transistor having the same channel polarity. The drain of the first transistor is connected to the source of the second transistor functioning as a gate grounded circuit. The drain of the second transistor is connected to the gates of the first and third transistors. A first and a second capacitive element are connected to the gate and drain of the first transistor. The current source supplies a bias current to each of the first and second transistors. The drain of the first transistor is used as an input terminal. An output signal is extracted from a drain current of the third transistor. Therefore, only one transconductance adjustment circuit is enough.Type: GrantFiled: December 28, 2011Date of Patent: January 8, 2013Assignee: Panasonic CorporationInventor: Hiroyasu Morikawa
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Publication number: 20120098574Abstract: A current-mode filter includes a first, a second, and a third transistor having the same channel polarity. The drain of the first transistor is connected to the source of the second transistor functioning as a gate grounded circuit. The drain of the second transistor is connected to the gates of the first and third transistors. A first and a second capacitive element are connected to the gate and drain of the first transistor. The current source supplies a bias current to each of the first and second transistors. The drain of the first transistor is used as an input terminal. An output signal is extracted from a drain current of the third transistor. Therefore, only one transconductance adjustment circuit is enough.Type: ApplicationFiled: December 28, 2011Publication date: April 26, 2012Applicant: Panasonic CorporationInventor: Hiroyasu MORIKAWA
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Patent number: 7976173Abstract: Disclosed herein is a projector for projecting an image to a screen, including: a lamp configured to emit light; an elliptic reflecting mirror configured to reflect and condense the light from the lamp; an image display device configured to modulate the light reflected and condensed by the elliptic reflecting mirror with image data corresponding to the image to convert the reflected light into image light; a projection lens disposed between the screen and the image display device and configured to project the image light from the image display device to the screen; and a position adjustment mechanism configured to displace the bright point of the lamp from a first focus of the elliptic reflecting mirror to adjust the position of the lamp so as to decrease the effective light amount of the image display device.Type: GrantFiled: February 27, 2008Date of Patent: July 12, 2011Assignee: Sony CorporationInventors: Hiroyasu Morikawa, Toshiyuki Shirasu, Daizo Oka
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Patent number: 7911274Abstract: The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.Type: GrantFiled: August 20, 2008Date of Patent: March 22, 2011Assignee: Panasonic CorporationInventors: Hiroyasu Morikawa, Masamichi Katada, Marie Nishinaka
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Patent number: 7648057Abstract: In an ultrasonic joining method for joining a flange portion of a first member to a portion of a second member, a first horn and a second horn are arranged on the flange portion on a side opposite to the second member, and the first horn is vibrated in a condition that the second horn is biased against the first horn and the first horn and the second horn are pressed against the flange portion such that the flange portion is vibrated while being pressed against the portion of the second member. Because the first horn is vibrated in a condition that the first horn and the second horn are pressed against each other at press-contact portions thereof, vibration of the first horn is transferred to the second horn through the press-contact portions.Type: GrantFiled: March 19, 2007Date of Patent: January 19, 2010Assignee: Denso CorporationInventors: Arinori Shimizu, Yuuichi Aoki, Hiroyasu Morikawa
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Publication number: 20090162586Abstract: In an ultrasonic joining method for joining a flange portion of a first member to a portion of a second member, a first horn and a second horn are arranged on the flange portion on a side opposite to the second member, and the first horn is vibrated in a condition that the second horn is biased against the first horn and the first horn and the second horn are pressed against the flange portion such that the flange portion is vibrated while being pressed against the portion of the second member. Because the first horn is vibrated in a condition that the first horn and the second horn are pressed against each other at press-contact portions thereof, vibration of the first horn is transferred to the second horn through the press-contact portions.Type: ApplicationFiled: February 19, 2009Publication date: June 25, 2009Applicant: DENSO CORPORATIONInventors: Arinori Shimizu, Yuuichi Aoki, Hiroyasu Morikawa
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Patent number: 7523849Abstract: An ultrasonic welding method and an ultrasonic welding device are provided to join a first member having a substantial pipe shape and a second member at a joining surface by pressure-applying and vibration-exciting. In an arranging process, each of a first horn member and a second horn member is slantways arranged in such a manner that a part of a pressure-applying surface thereof which is nearer to a division surface thereof becomes nearer to the joining surface, according to deformation in a joining process. Thus, in the joining process, the pressure-applying surfaces are disposed substantially parallel to the joining surface due to a pressure-applying reaction force, so that the first horn member and the second horn member can be pressed against each other at the division surfaces thereof.Type: GrantFiled: March 19, 2007Date of Patent: April 28, 2009Assignee: Denso CorporationInventors: Yuuichi Aoki, Yoshihiko Matsusaka, Hiroyasu Morikawa, Arinori Shimizu, Hirokazu Hashimoto
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Patent number: 7486139Abstract: The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.Type: GrantFiled: July 7, 2006Date of Patent: February 3, 2009Assignee: Panasonic CorporationInventors: Hiroyasu Morikawa, Masamichi Katada, Marie Nishinaka
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Publication number: 20090015330Abstract: The variable transconductance circuit includes: a voltage-current conversion circuit for outputting a current signal linear with an input voltage signal; first and second MOS transistors for converting the current signal received to a square-root compressed voltage signal; and third and fourth MOS transistors for converting the square-root compressed voltage signal to a linear current signal. A bias current at the first and second MOS transistors and a bias current at the third and fourth MOS transistors are varied to control transconductance.Type: ApplicationFiled: August 20, 2008Publication date: January 15, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Hiroyasu Morikawa, Masamichi Katada, Marie Nishinaka
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Publication number: 20080246928Abstract: Disclosed herein is a projector for projecting an image to a screen, including: a lamp configured to emit light; an elliptic reflecting mirror configured to reflect and condense the light from the lamp; an image display device configured to modulate the light reflected and condensed by the elliptic reflecting mirror with image data corresponding to the image to convert the reflected light into image light; a projection lens disposed between the screen and the image display device and configured to project the image light from the image display device to the screen; and a position adjustment mechanism configured to displace the bright point of the lamp from a first focus of the elliptic reflecting mirror to adjust the position of the lamp so as to decrease the effective light amount of the image display device.Type: ApplicationFiled: February 27, 2008Publication date: October 9, 2008Applicant: Sony CorporationInventors: Hiroyasu MORIKAWA, Toshiyuki Shirasu, Daizo Oka
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Publication number: 20080218703Abstract: Disclosed herein is a projector for projecting an image to a screen, including: a lamp configured to emit light; an elliptic reflecting mirror configured to reflect and condense the light from the lamp; a sensor configured to detect the amount of the light reflected and condensed by the elliptic reflecting mirror; a lamp power supply configured to supply power to the lamp to drive the lamp; and a control circuit configured to successively increase the power to be supplied from the lamp power supply to the lamp until after a variation value of the amount of the reflected light detected by the sensor becomes equal to or lower than a predetermined threshold value.Type: ApplicationFiled: February 11, 2008Publication date: September 11, 2008Applicant: SONY CORPORATIONInventors: Toshiyuki SHIRASU, Daizo OKA, Hiroyasu MORIKAWA
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Patent number: 7317667Abstract: A wobble signal extraction circuit for extracting a wobble signal from a first optical disk signal containing a wobble signal component caused by a wobble formed on a surface of an optical disk and a second optical disk signal containing a wobble signal component of a reversed phase to that of the first optical disk signal, wherein signal level fixing sections (24a; and 24b) fix the first and second optical disk signals to a predetermined level when a discontinuity of the wobble is detected.Type: GrantFiled: October 19, 2004Date of Patent: January 8, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Youichi Kanekami, Hiroyasu Morikawa