Patents by Inventor Hiroyasu Negishi
Hiroyasu Negishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11215970Abstract: A processing control device controls a tool for processing a first workpiece. The processing control device includes a driving unit to drive the tool, an output unit, and a control unit to control the driving unit and the output unit. Processing information obtained by performing preliminary processing on a second workpiece before performing first processing on the first workpiece is transmitted by the control unit to the output unit and accordingly the processing information is outputted from the output unit. The control unit generates a control command for performing second processing that is performed on the first workpiece after the first processing. The control unit controls the driving unit according to the control command.Type: GrantFiled: April 27, 2017Date of Patent: January 4, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Atsushi Hori, Kentaro Mori, Tomoya Fujita, Goh Sato, Akihiko Imagi, Hiroyasu Negishi
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Publication number: 20210124332Abstract: A processing control device controls a tool for processing a first workpiece. The processing control device includes a driving unit to drive the tool, an output unit, and a control unit to control the driving unit and the output unit. Processing information obtained by performing preliminary processing on a second workpiece before performing first processing on the first workpiece is transmitted by the control unit to the output unit and accordingly the processing information is outputted from the output unit. The control unit generates a control command for performing second processing that is performed on the first workpiece after the first processing. The control unit controls the driving unit according to the control command.Type: ApplicationFiled: April 27, 2017Publication date: April 29, 2021Applicant: Mitsubishi Electric CorporationInventors: Atsushi HORI, Kentaro MORI, Tomoya FUJITA, Goh SATO, Akihiko IMAGI, Hiroyasu NEGISHI
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Publication number: 20210080937Abstract: An information analysis device includes a processor and a storage unit. The processor includes: a worker information calculator to calculate worker information including at least one of an action speed of a worker and a position of the worker based on first information acquired from a first detector; a progress information calculator to calculate work progress information including a progress speed of the work based on second information acquired from a second detector; a product information calculator to calculate product information including at least one of a stock quantity of the product and a position of the product based on third information acquired from a third detector; and an information connection extractor to generate data indicating a connection between at least two types of information, among the worker information, the work progress information and the product information, in regard to each of a plurality of predetermined time slots.Type: ApplicationFiled: February 15, 2018Publication date: March 18, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Satoshi SAKURAI, Hiroyasu NEGISHI, Masaru KIMURA, Tomoharu AWANO, Kosuke HOSOYA
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Publication number: 20190310755Abstract: In a coordinate correction apparatus, a coordinate acquisition unit sequentially acquires coordinates of touch positions on a touch panel when a touch operation is continued on the touch panel. When the coordinate acquisition unit acquires first coordinates which are coordinates of a new touch position, a coordinate correction unit calculates a weighted average of the first coordinates and second coordinates determined from coordinates of a past touch position acquired by the coordinate acquisition unit, with applying weighting that varies according to a touch movement amount on the touch panel. The coordinate correction unit outputs a calculation result as corrected coordinates. An application unit uses the corrected coordinates.Type: ApplicationFiled: March 22, 2016Publication date: October 10, 2019Applicant: Mitsubishi Electric CorporationInventors: Yuichi SASAKI, Atsushi HORI, Kentaro MORI, Hiroyasu NEGISHI
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Patent number: 10282887Abstract: A moving image reproduction unit (104) generates display object information for each of a plurality of frames, using difference information for each object associated with each frame and reproduces a moving image. An analysis unit (102) analyzes the difference information for each frame and determines a frame attribute that is an attribute of the frame. When a frame other than a head frame of the plurality of frames is specified as a reproduction start frame from which the reproduction of the moving image starts, the moving image reproduction unit (104) extracts one of the plurality of frames based on the frame attribute determined by the analysis unit (104). Further, the moving image reproduction unit (104) generates display object information of the reproduction start frame, using the difference information of the frame extracted and the difference information of the reproduction start frame, and starts the reproduction of the moving image from the reproduction start frame.Type: GrantFiled: December 12, 2014Date of Patent: May 7, 2019Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Kentaro Mori, Atsushi Hori, Hiroyasu Negishi
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Publication number: 20190095093Abstract: A gesture determination unit (143) extracts a moving locus of a pointer from a time when the pointer makes contact with the touch panel until the pointer goes away from the touch panel. Then, the gesture determination unit (143) identifies a control target parameter, which is a parameter of a control target, and a controlled variable of the control target parameter that are specified by a movement of the pointer, by analyzing the extracted moving locus of the pointer.Type: ApplicationFiled: April 28, 2016Publication date: March 28, 2019Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Atsushi HORI, Yuichi SASAKI, Hiroyasu NEGISHI, Kentaro MORI, Akira TORII, Takuya MAEKAWA, Toshiyuki HAGIWARA
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Publication number: 20190026925Abstract: A first memory is a main memory that stores a texture image group. A second memory is a VRAM that stores a first texture atlas in which one or more texture images copied from the texture image group are arranged, and a second texture atlas to be newly generated. A texture copy section copies at least one of the texture images arranged in the first texture atlas from the first texture atlas to the second texture atlas.Type: ApplicationFiled: March 15, 2016Publication date: January 24, 2019Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Satoshi SAKURAI, Makoto OTSURU, Hiroyasu NEGISHI, Mitsuo SHIMOTANI, Haruhiko WAKAYANAGI, Takeshi SHIMIZU
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Publication number: 20170249770Abstract: A moving image reproduction unit (104) generates display object display information for each of a plurality of frames, using difference information for each object associated with each frame and reproduces a moving image. An analysis unit (102) analyzes the difference information for each frame and determines a frame attribute that is an attribute of the frame. When a frame other than a head frame of the plurality of frames is specified as a reproduction start frame from which the reproduction of the moving image starts, the moving image reproduction unit (104) extracts one of the plurality of frames based on the frame attribute determined by the analysis unit (104). Further, the moving image reproduction unit (104) generates display object information of the reproduction start frame, using the difference information of the frame extracted and the difference information of the reproduction start frame, and starts the reproduction of the moving image from the reproduction start frame.Type: ApplicationFiled: December 12, 2014Publication date: August 31, 2017Applicant: Mitsubishi Electric CorporationInventors: Kentaro MORI, Atsushi HORI, Hiroyasu NEGISHI
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Publication number: 20150302612Abstract: An image-rendering device: divides a large region whose minimum configuration unit is an element into small regions each configured with the elements; calculates low resolution distance data showing a distance from a base line serving as a reference for color change in gradation for each of the small regions; associates low resolution distance data showing each distance from the base line for each of the small regions with high resolution distance data showing each distance from the base line to each of the elements, and stores them in high resolution data storage; obtains, from the high resolution data storage, the high resolution distance data associated with the calculated low resolution distance data; and renders gradation on the basis of the high resolution distance data. Therefore, it is possible to reduce the number of times for calculating a minimum distance between the base line and each pixel.Type: ApplicationFiled: June 18, 2013Publication date: October 22, 2015Applicant: Mitsubishi Electric CorporationInventors: Kotoyu ISHIKAWA, Ken MIYAMOTO, Shoichiro KUBOYAMA, Makoto OTSURU, Hiroyasu NEGISHI
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Publication number: 20140354652Abstract: A character drawing device includes a system memory that stores outline fonts each defining outlines of characters, and an arithmetic processor that generates rectangles on the outline part of a character shown by an outline font read from the above-mentioned storage, adjusts a width of each of the generated rectangles according to the thickness of the character, and sets a degree of transparency to an inside region of the character which is enclosed by each of the rectangles after the adjustment and a degree of transparency to each of the rectangles to draw the character.Type: ApplicationFiled: April 27, 2012Publication date: December 4, 2014Applicant: Mitsubishi Electric CorporationInventors: Hiroyasu Negishi, Takuya Maekawa, Takenori Kawamata
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Publication number: 20140192072Abstract: An arithmetic processor 1 includes a queuer 102 that controls a queue memory 102, a load database 103 that holds drawing load information corresponding to a search key which can be extracted from a drawing command, a load determinator 104 that searches through the load database 103 for drawing load information according to the drawing command stored in the queue memory, and that calculates a drawing processing time of the above-mentioned drawing command, and a drawing scheduler 105 that instructs the queuer 102 to change an order in which the drawing command stored in the queue memory 21 is processed and/or to divide the above-mentioned drawing command on the basis of a priority assigned to the above-mentioned drawing command and the drawing processing time of the above-mentioned drawing command calculated by the load determinator 104.Type: ApplicationFiled: January 6, 2012Publication date: July 10, 2014Applicant: Mitsubishi Electric CorporationInventor: Hiroyasu Negishi
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Patent number: 8520007Abstract: A distance information generating unit 4 for rasterizing minute line segments divided by a curved line dividing unit 2 through a combination of straight line cells and corner cells to generate distance information corresponding to a pixel 12 of a display and an edge rasterizing unit 7 for rasterizing edge information about the minute line segments divided by the curved line dividing unit 2 are disposed, and a mapping unit 10 determines whether the pixel 12 is located inside or outside by using the edge information rasterized by the edge rasterizing unit 7, and maps the distance information generated by the distance information generating unit 4 onto the antialiasing intensity 11 of a component 13 included in the pixel 12 according to the results of the inside or outside determination.Type: GrantFiled: January 15, 2008Date of Patent: August 27, 2013Assignee: Mitsubishi Electronic CorporationInventors: Yoshiyuki Kato, Akira Torii, Hiroyasu Negishi, Ryohei Ishida, Masaki Hamada
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Publication number: 20100271382Abstract: A distance information generating unit 4 for rasterizing minute line segments divided by a curved line dividing unit 2 through a combination of straight line cells and corner cells to generate distance information corresponding to a pixel 12 of a display and an edge rasterizing unit 7 for rasterizing edge information about the minute line segments divided by the curved line dividing unit 2 are disposed, and a mapping unit 10 determines whether the pixel 12 is located inside or outside by using the edge information rasterized by the edge rasterizing unit 7, and maps the distance information generated by the distance information generating unit 4 onto the antialiasing intensity 11 of a component 13 included in the pixel 12 according to the results of the inside or outside determination.Type: ApplicationFiled: January 15, 2008Publication date: October 28, 2010Inventors: Yoshiyuki Kato, Akira Torii, Hiroyasu Negishi, Ryohei Ishida, Masaki Hamada
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Publication number: 20060200631Abstract: The present invention aims to prefetch data which is stored in a cache memory and whose probability of access is high by replacing data whose probability of access is low. On discriminating a cache miss of target data which is used for an operation process performed by an operation processing unit, a cache hit discriminating unit obtains the target data from a main memory. Further, when the cache hit discriminating unit discriminates a cache hit, an invalid data discriminating unit discriminates a cache line including the target data is the same as the one including data which has been used for the previous operation process. Then, when the invalid data discriminating unit discriminates the cache line including the target data is different from the cache line including the data used for the previous operation process, a prefetch controlling unit prefetches the data by replacing data stored in the main memory with the cache line including the data used for the previous operation process.Type: ApplicationFiled: March 2, 2005Publication date: September 7, 2006Inventors: Seiji Seki, Toshihisa Kamemaru, Hiroyasu Negishi, Junko Kobara
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Publication number: 20030206173Abstract: The geometry processor includes mutually independent first and second external interface ports connected to a host processor, and a rendering processor, respectively, and a geometry calculation core which processes a geometry calculation applied through the first external interface port from the host processor. The geometry calculation core includes a plurality of SIMD type floating point calculating units, a floating point power computing unit, an integer calculating unit, a controller responsive to an instruction from the host processor which controls the plurality of floating point calculating units, the floating point power computing unit and the integer calculating unit to process data from the host processor, and an output controller which outputs the processed data to the rendering processor through the second external interface port.Type: ApplicationFiled: March 19, 2003Publication date: November 6, 2003Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Keijiro Yoshimatsu, Junko Kobara, Hiroyasu Negishi
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Publication number: 20030197705Abstract: The geometry processor includes mutually independent first and second external interface ports connected to a host processor, and a rendering processor, respectively, and a geometry calculation core which processes a geometry calculation applied through the first external interface port from the host processor. The geometry calculation core includes a plurality of SIMD type floating point calculating units, a floating point power computing unit, an integer calculating unit, a controller responsive to an instruction from the host processor which controls the plurality of floating point calculating units, the floating point power computing unit and the integer calculating unit to process data from the host processor, and an output controller which outputs the processed data to the rendering processor through the second external interface port.Type: ApplicationFiled: November 14, 2002Publication date: October 23, 2003Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Keijiro Yoshimatsu, Junko Kobara, Hiroyasu Negishi
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Patent number: 6603481Abstract: The geometry processor includes mutually independent first and second external interface ports connected to a host processor, and a rendering processor, respectively, and a geometry calculation core which processes a geometry calculation applied through the first external interface port from the host processor. The geometry calculation core includes a plurality of SIMD type floating point calculating units, a floating point power computing unit, an integer calculating unit, a controller responsive to an instruction from the host processor which controls the plurality of floating point calculating units, the floating point power computing unit and the integer calculating unit to process data from the host processor, and an output controller which outputs the processed data to the rendering processor through the second external interface port.Type: GrantFiled: April 19, 1999Date of Patent: August 5, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Keijiro Yoshimatsu, Junko Kobara, Hiroyasu Negishi
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Patent number: 6480873Abstract: A power operation device comprises a bit operation unit or performing a bit shift operation on a logarithmic base bit string from a logarithm operation unit according to an input exponent bit string Y, and for furnishing the shifted logarithmic base bit string as a multiplication bit string. An exponent checking unit checks whether or not the input exponent bit string Y is the ith power of a base 2 where i is an integer, and, if so, furnishes a selection signal to direct selection of the multiplication bit string from the bit operation unit. A multiplication bit string selection unit selects and furnishes the multiplication bit string when it receives the selection signal from the exponent checking unit. In contrast, the multiplication bit string selection unit selects and furnishes another multiplication bit string from a multiplier otherwise. An exponential operation unit performs a base-2 exponential operation on the selected multiplication bit string from the multiplication bit string selection unit, i.e.Type: GrantFiled: January 5, 2000Date of Patent: November 12, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yoshitsugu Inoue, Hiroyuki Kawai, Junko Kobara, Robert Streitenberger, Keijiro Yoshimatsu, Hiroyasu Negishi
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Patent number: 6442627Abstract: An output FIFO data transfer control device can comprise a geometric arithmetic core including one integer processing unit or IPU and a plurality of floating-point processing units or FPUs. Each processing unit includes an intermediate buffer or data output buffer for storing a data on an arithmetic result. When an instruction of data transfer from at least one of the plurality of processing units to one output FIFO is issued, a write/read pointer generating unit generates a write pointer identifying a specific location where data on an arithmetic result associated with the instruction is to be stored in the intermediate buffer of at least one of the plurality of processing units. The write/read pointer generating unit also generates a read pointer identifying a specific location where data is to be read out of the intermediate buffer of at least one of the plurality of processing units.Type: GrantFiled: December 3, 1999Date of Patent: August 27, 2002Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroyasu Negishi, Junko Kobara, Yoshitsugu Inoue, Hiroyuki Kawai, Keijiro Yoshimatsu, Nelson Chan, Robert Streitenberger
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Patent number: 6005590Abstract: The apparatus comprises an input memory 102 for storing data necessary for geometrical operations, such as coordinate transformation, luminance calculation, and clipping operation of graphics; a global bus connected to the input memory; a plurality of floating process memories connected to the global bus, for receiving data necessary for geometrical operations; a sequencer for transmitting data necessary for geometrical operations, stored in the input memory, to the plurality of floating process memories; and a plurality of floating processing units each connected to a respective one of the plurality of floating process memories, for independently executing geometrical operations, using data transmitted from the floating process memories.Type: GrantFiled: November 5, 1996Date of Patent: December 21, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroyasu Negishi, Masatoshi Kameyama, Yoshitsugu Inoue, Hiroyuki Kawai